Transcript Phase locked loop - GUC - Faculty of Information Engineering

PHASE LOCKED LOOP
Prepared by : Lobna Amer
Youmna Hassan
Mariam Mohamed
HISTORY
• In 1919, W. H. Eccles and J. H. Vincent found that two electronic oscillators that had
been tuned to oscillate at slightly different frequencies but that were coupled to a
resonant circuit would soon oscillate at the same frequency.
• Automatic synchronization of electronic oscillators was described in 1923 by Edward
Victor Appleton.
• Research started in 1932 on PLL to find an alternative to already existing receivers
(why?)
• The technique was described in 1932, in a paper by Henri de Bellescize, in the
French journal L'Onde Électrique
• When Signetics introduced a line of monolithic integrated circuits such as the NE565
that were complete phase-locked loop systems on a chip in 1969, applications for
the technique multiplied. A few years later RCA introduced the "CD4046" CMOS
Micropower Phase-Locked Loop, which became a popular integrated circuit.
CD4046
Car Race Analogy
GENERAL CONCEPT
𝒅∅
𝒅𝒕
=𝝎
Fig. 1. Phase difference between two waves
GENERAL CONCEPT
Fig. 2. Basic topology of PLL
GENERAL CONCEPT
• Input signal (𝜔𝑖 - ∅𝑖 )
• Output signal (𝜔𝑜 - ∅𝑜 )
• PLL locks the phases of the signals together making 𝜔𝑖 equal
to 𝜔𝑜
• Condition for locking : | 𝜔𝑖 - 𝜔𝑜 | < K
NOTE: K is the closed
loop gain of the PLL
ARCHITECTURE
• What do we need to reach?
• What can we use to produce the error signal?
• what can we use to convert the incoming Voltage to a corresponding
frequency?
ARCHITECTURE
• What is the gain of the negative feedback system? A/(1+A)
• no matter how high A is, the gain will always seem to not reach a high
enough value
• Using integrators: integrating the error signal, if the output of the phase
detector is more than zero, signal is infinitely large, thus, output is infintely
large
ARCHITECTURE
• Problems regarding using one integrator:
• If the input is a square wave, the output would match the input with no errors
seen
• However, if the input signal is a ramp. The output signal will always have a
constant error no matter what we do.
• Thus, I can NOT build it with only one integrator
• What about using 2 integrators? the TF contains 2 poles --> Unstable system
ARCHITECTURE
Then we need something to ensure system stability and introduce the error to
the VCO in a certain way that ensures a convenient output signal
Solution:
• Use an enhanced phase detector
• Use a low pass filter
PHASE DETECTOR
Analog PD (Multiplier/Mixer)
Diode Ring Double Balanced
Mixer :
• Operation
• Inputs:
A1 cos (𝜔𝐿𝑂 t – ∅𝐿𝑂 )
A2 cos (𝜔𝑅𝐹 t – ∅𝑅𝐹 )
• Outputs after filtering:
A1 cos (∅𝑅𝐹 – ∅𝐿𝑂 )
Fig. 3. Basic diode ring mixer circuit
PHASE DETECTOR
Analog PD (Multiplier/Mixer)
Diode Ring Double Balanced Mixer :
• Characteristics: Phase shift = ±90°  IF output voltage is zero
Phase shift = 0°  IF output voltage is the maximum
positive value (A1)
Phase shift = 180°  IF output voltage is the maximum
negative value (-A1)
• Drawbacks: No memory element
PHASE DETECTOR
Digital PD
XOR:
• Operation
• Drawbacks
Cannot differentiate
between +ve and –ve
phase difference
•
Fig. 4. XOR phase detector inputs and outputs
PHASE DETECTOR
Digital PD
• Required :
Edge Triggered Operation
Differentiates between +ve and –ve phase difference
• State chart
States to represent the phase difference
• Implementation
Number of flip flops to represent number of states
PHASE DETECTOR
Digital PD
D – Flip Flops:
• Inputs
∅𝑟𝑒𝑓 ∅𝑜𝑢𝑡
0
1
1
0
0
0
1
1
• Drawbacks
Needs averaging
Outputs
Up
Down
0
0
PHASE DETECTOR
Digital
PD
D – Flip
Flops +
Charge
Pump
Fig. 5. D- Flip Flops PD
Fig. 6. Charge Pump
PHASE DETECTOR
Digital PD
D – Flip Flops + Charge Pump:
• Converts flip flop pulses to analog current pulses.
• Current pulses conditioned by Low Pass Filter.
• UP signal causes current to flow to the filter (𝑉𝑐𝑡𝑟𝑙 ↑)
• DOWN signal causes current to flow from the filter
(𝑉𝑐𝑡𝑟𝑙 ↓)
• If both UP and Down are High or Low → No Current
flows → 𝑉𝑐𝑡𝑟𝑙 does not change
LOW PASS FILTER
LOW PASS FILTER
LOW PASS FILTER
• needed to remove any unwanted high frequency components which might
pass out of the phase detector and appear in the VCO tune line.
• High frequency if passed causes sparious signals
• Mixer Example: If a mixer is used as a phase detector, it will produce two
signals: the sum and difference frequencies.
• As the two signals entering the phase detector have the same frequency the
difference frequency is zero and a DC voltage is produced proportional to
the phase difference as expected
• The sum frequency is also produced and this will fall at a point equal to twice
the frequency of the reference. If this signal is not attenuated it will reach the
control voltage input to the VCO and give rise to spurious signals.
LOW PAS FILTER
• Spurious signals
LOW PASS FILTER
• The filter also affects the ability of the loop to change frequencies quickly.
• If the filter has a very low cut-off frequency then the changes in tune voltage
will only take place slowly, and the VCO will not be able to change its
frequency as fast. This is because a filter with a low cut-off frequency will only
let low frequencies through and these correspond to slow changes in
voltage level.
• Conversely a filter with a higher cut-off frequency will enable the changes to
happen faster. However when using filters with high cut-off frequencies, care
must be taken to ensure that unwanted frequencies are not passed along
the tune line with the result that spurious signals are generated.
LOW PASS FILTER
LPF bandwidth:
• Do I need a high bandwidth or a low one?
• What is the optimum value for the bandwidth?
LOW PASS FILTER
• It also governs the stability of the loop by varying the values of R and C
• It helps to ensure that the voltage is reasonably clean DC. Otherwise, you
can imagine that an unfiltered control input could cause the PLL to become
an oscillator, with the VCO always chasing the signal frequency, but
constantly under-and overshooting the stable point.
VOLTAGE CONTROLLED
OSCILLATOR
Main Requirements for VCO:
• Phase stability
• large frequency deviation
• high modulation sensitivity
• linearity of frequency versus control voltage
Fulfilling higher phase stability opposes achieving any of the other
requirements.
VOLTAGE CONTROLLED
OSCILLATOR
Four types of VCO (In order of decreasing stability):
• Voltage Controlled Crystal Oscillators
• Resonator Oscillators
• RC Multi-vibrators
• YIG-tuned Oscillators
PLL APPLICATIONS
• FM Demodulation
• Frequency Synthesizer
• Motor speed control
• clock distribution
• clock generation in digital communications.
Frequency
Synthesizer
FREQUENCY SYNTHESIZER
• Frequency-Selective frequency multiple by inserting divider into feedback
between VCO output and comparator input.
• A phase detector compares two input signals and produces an error signal
which is proportional to their phase difference. The error signal is then low-pass
filtered and used to drive a VCO which creates an output phase. The output
is fed through a divider back to the input of the system, producing a negative
feedback loop.
• If the output phase drifts, the error signal will increase, driving the VCO phase
in the opposite direction so as to reduce the error.
• A programmable divider is particularly useful in radio transmitter applications.
Demodulation
DEMODULATION
• Demodulation is the act of extracting the original information bearing signal
from modulated carrier wave.
• The Indirect Demodulator is Phase Lock Loop
DEMODULATION
OF
FM
SIGNAL
1 - filter the signal in order to eliminate all noise outside of
the signal band. Broadcast FM signals are filtered by a
band-pass filter prior to transmitting.
2 - Modulated FM signal is to pass it through a limiter. This
will restrict the signal amplitude to the range -VL to +VL .
The output is a series of nearly rectangular pulses.
3
- low-pass filter eliminates the higher frequency
components from these pulses to obtain a signal which
very closely resembles the transmitted FM signal:
PLL APPLICATIONS
• FM Demodulation:
 PLL FM demodulators are found in many types of radio
equipment's ranging from broadcast receivers to high
performance communications equipment.
 High frequencies are not normally needed, for PLL FM
demodulators, the circuit must be capable of operating at the
intermediate frequency of the receiver, and for receivers
using FM this was often 10.7 MHz. Although by today's
standards, this is not high, it was necessary for the technology
to reach this state before PLL FM demodulators became
available.
PLL FM DEMODULATION BASICS
PLL FM demodulator works relatively straightforward. It
requires no changes to the basic PLL itself, using the basic
operation of the loop to provide the required output.
ADVANTAGES
• Linearity: The linearity of the PLL FM demodulator is ruled by the voltage to
frequency characteristic of the VCO within the PLL. As the frequency
deviation of the incoming signal normally only swings over a small portion of
the PLL bandwidth,
The characteristic of the VCO can be made relatively linear, the distortion
levels from phase locked loop demodulators are normally very low. Distortion
levels are typically a tenth of a percent.
ADVANTAGES
• Manufacturing costs: Only a few external components are required, and in
some instances it may not be necessary to use an inductor as part of the
resonant circuit for the VCO. These facts make the PLL FM demodulator
particularly attractive for modern applications.
QUESTIONS
• Q4 How to increase the phase stability of the VCO?
• Using high Q crystal and circuit
• Stabilizing temperature
• Keeping mechanical stability
QUESTIONS
•
•
•
•
What is the Condition for locking ?
| 𝜔𝑖 - 𝜔𝑜 | < K
What do we need to reach?
Locking input and output phases
• What can we use to produce the error signal?
• Phase detector
• what can we use to convert the incoming Voltage to a corresponding
frequency?
• VCO
QUESTIONS
What are the different types of phase detectors? What structures are used in both?
Analog and digital
Analogue  diode ring double balanced mixer
Digital  flip flops + charge pump
What is the function of the charge pump?
Converts FF pulses into current pulses that are suitable for conditioning by the low pass
filter
The output voltage of phase detector is
a) Phase voltage
b) Free running voltage
c) Error voltage
d) None of the mentioned
• Answer: c
Explanation: The phase detector compares the input frequency with the feedback
frequency and produces output dc voltage called as error voltage.
•
•
•
•
•
•
QUESTIONS
• List three distinct applications of PLLs, apart from FM demodulation, and frequency
synthesis
 Answer: Motor speed control, clock distribution, and clock generation in digital
communications.
• What is the function of low pass filter in phase-locked loop?
a) Improves low frequency noise
b) Removes high frequency noise
c) Tracks the voltage changes
d) Changes the input frequency
• Answer: b
Explanation: The output voltage of a phase detector is a dc voltage and is often
referred to as error voltage. This output is applied to the low pass filter which removes
the high frequency noise and produces a dc level.
QUESTION
This is how FM radio communication works: by modulating the frequency of a radiofrequency (RF) signal according to the amplitude of the voltage signal produced by a
microphone.
Explain how a phase-locked loop circuit could be used to "demodulate" the output of an
FM radio station, so as to extract the broadcaster's audio signal from the RF waveform.
ANSWER:
• This diagram, simplified system for FM demodulation:
QUESTION
• An 10nH inductor has a Q of 5 and is used to create a tank circuit with a
10pF capacitor.
Assume the capacitor is ideal.
(a.) What is the resonant frequency of this circuit?
(b.) What value of parallel negative resistance should be used to create an
oscillator?
(c.) If C is changed to 20 pF, what is the new value of the parallel negative
resistance?
SOLUTION :
QUESTION :
Consider the PLL shown where 𝐾𝑣=104 and 𝐾𝑜=1 krads⁄ per V.
a) What is the order of the loop?

Answer: 1st order
b) What is the time constant of the loop?
 Answer:
𝜏=1/𝐾𝑣=100 us
c) What is the 3-dB bandwidth of the loop in Hz?
 Answer:
𝑓3𝑑𝐵=1/2𝜋𝜏=1.6 kHz
d) Write down an expression for the transfer
function 𝐻(𝑠)=𝜃𝑜(𝑠)/𝜃𝑖(𝑠)
Answer:
e)If the input frequency changes with a step, what is the rise time of the VCO
control voltage assuming the loop stays in lock?
Answer:
𝑡𝑟≈2.2𝜏=220 𝜇𝑠
LATEST RESEARCH
Publish date: April 2015
• Published on IEEE
• Topic: Demonstrating a radio-over-fiber multiple access time delay sensing
and frequency dissemination scheme.
REFRENCES
• S. C. Gupta, “Phase-locked loops,” Proc. IEEE, vol. 63, pp. 291-306, Feb. 1975.
• C. A. Sharpe, “A 3-state phase detector can improve your next PLL design,” EDN, pp. 55-59, Sept. 1976.
• J. A. Afonso, A. J. Quiterio, and D. S. &ants, “A phase-locked loop with digital frequency compare for
timing signal recovery,” in Con Rec., I979 Nut. Telecommun. Conf., paper 14.4
• Roland E. Best (2007). Phase-Locked Loops: Design, Simulation and Applications (6th ed.). McGraw Hill.
ISBN 978-0-07-149375-8.
• G. A. Leonov, N. V. Kuznetsov, M. V. Yuldashev, R. V. Yuldashev; Kuznetsov; Yuldashev; Yuldashev (2011).
"Computation of Phase Detector Characteristics in Synchronization Systems"
• N. Kamal, Y. Zhu, S. Al-Sarawi, N. Weste, and D. Abbott, "A SiGe 6 modulus prescaler for a 60 GHz
frequency synthesizer," in SPIE, vol. 6798, 2007, p. 67980E.