Outer Pixel ½ STAVE Discussion(1)

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Transcript Outer Pixel ½ STAVE Discussion(1)

Outer Pixel STAVE
Discussion
Presented
by
David Nelson
[email protected]
October 13, 2008
1
D. Nelson
Outer Pixel ½ STAVE Discussion(1)
800mm x 38mm
8 modules
4 ASICs in each
module
1.5 volt low voltage
500 volt max high
voltage
OUTER LAYER ½ STAVE
4ASIC
ASIC
0
MODULE
MODULE 1
40MHZ CLK, CMD, Trig, SPARE
160MHZ CLK, DATA
TELEMETRY
MODULE 0
40MHZ CLK, CMD, Trig, SPARE
160MHZ CLK, DATA
TELEMETRY
ASIC
2
ASIC
1
ASIC
3
ASIC
2
ASIC
1
ASIC
3
ASIC
3
LOW VOLTAGE
HIGH VOLTAGE
NOTES:
(1) ½ STAVE IS 80cm long, 38mm wide
(2) ½ STAVE has 8 modules with 4 ASICs each
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D. Nelson
ASIC
1
4ASIC
ASIC
0
MODULE
4ASIC
ASIC
0
MODULE
ASIC
2
Due to existing cables
October 13, 2008
MODULE 7
40MHZ CLK, CMD, TRIG, SPARE
160MHZ CLK, DATA
TELEMETRY
EOS CONNECOR(s)
0.5 amps each ASIC
16 amps per ½ STAVE
E.O.S.
CNTLR
Outer Pixel ½ STAVE Discussion(2)
Some Numbers
PWB copper resistances
0.25 oz
0.4mil,(9um)
2.0 mΩ/square
0.5 oz 0.7mil,(18um)
1.0 mΩ/square
1.0 oz 1.4mil,(35um)
0.5 mΩ/square
2.0 oz 2.8mil,(70um)
0.24 mΩ/square
The ½ STAVE is about 20 squares long
Should loose less than 5% voltage on power buses
5% drop on the 1.5 volt bus is 75 mV
Total voltage budget is typically +/-10%
Using ½ oz copper, 20 mm wide for low voltage power to furthest
module which is 800 mm from EOS
1.0 mΩ/square * 40 squares * 2 amps = 80 mV
IPC suggests minimum trace spacing is 250um for up to 500 volts on
inner layers and 1 mm for surface layers with polymer coating.
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Outer Pixel ½ STAVE Discussion(3)
Some more Numbers
IPC standards suggests that PWB traces and
spaces are > 4 mils (100 um) wide.
We should be 6 mils (150 um) traces or greater.
We could accommodate a maximum of 60 differential
LVDS pairs on one layer.
From slide 2, we have 3 pair + 1 pair spare for
commanding, 2 pair for return data and clock,
and 1 pair for telemetry.
Total of 7 pair per module for a total of 56 pairs.
Need more layers?
October 13, 2008
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Outer Pixel ½ STAVE Discussion(4)
And some more numbers
Impedance
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Outer Pixel ½ STAVE Discussion(5)
Questions and issues.
How many data pairs required from modules to
EOS?
Do we need two pair due to data rate?
What is the segmentation for low voltage
distribution?
What is the segmentation for high voltage
distribution?
How many PWB layers can the STAVE be?
What is the R.L. requirements for the STAVE?
Can we use thicker copper for power planes?
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Outer Pixel ½ STAVE Discussion(5)
Power delivery to the STAVE.
What is the low voltage power requirements?
Some question between 24W and 48W per ½ STAVE
Can we use aluminum wire for the high current low
voltage delivery?
Less R.L.
Should we use multi twisted pair wires for power
delivery?
My experience is we should.
NASA required multi-pair for GLAST
Maurice tells me he thinks single pin connector are better.
Should we use the power cable for data transmission?
Many pairs would reduce bandwidth requirements.
DCS could use power lines as well?
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