TG4a UWB PHY Activity summary March- May 2005

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Transcript TG4a UWB PHY Activity summary March- May 2005

May 15, 2005
doc.: IEEE 15-05-0325-00-004a
Project: IEEE P802.15 Working Group for Wireless Personal Area
Networks (WPANs)
Submission Title: TG4a UWB PHY Pulse Peak to Peak voltage versus CMOS
technologies
Date Submitted: 15 May 2005
Source: Philippe Rouzet (STMicroelectronics)
Contact: Philippe rouzet
Voice: +41 22 929 5866, E-Mail: [email protected]
Abstract:. Brief revue of Integrated Circuit CMOS technologies for evaluation of
optimum peak to peak voltage to be used for UWB PHY pulses. The
figures refer to STMicroelectronics technologies
Purpose: To provide a basis for further discussion on UWB PHY .
Notice: This document has been prepared to assist the IEEE P802.15. It is offered
as a basis for discussion and is not binding on the contributing
individual(s) or organization(s). The material in this document is subject to
change in form and content after further study. The contributor(s)
reserve(s) the right to add, amend or withdraw material contained herein.
Release: The contributor acknowledges and accepts that this contribution becomes
the property of IEEE and may be made publicly available by P802.15.
TG4a
Slide 1
Philippe Rouzet (STMicroelectronics)
May 15, 2005
doc.: IEEE 15-05-0325-00-004a
CMOS peak to peak Voltage for pulse transmission
(1/2)
Summary (based on STMicroelectronics CMOS technology):
Techno. node 0.18um 0.13um
.09um
0.065um
-----------------------------------------------------------------------------------------core (V)
1.8
1.2
1.0 /1.2
(0.9/1.2)
I/O (V)
3.3
2.5/3.3
2.5/3.3
Comments: see next slide
In summary,
as a semiconductor company, ST would recommend to consider 1
V ptp max. and even less for durability of the pulse definition
(next CMOS generations to come) if our primary concern is cost,
power consumption and multi fab. compatibility.
TG4a
Slide 2
Philippe Rouzet (STMicroelectronics)
May 15, 2005
doc.: IEEE 15-05-0325-00-004a
CMOS peak to peak Voltage for pulse transmission
(2/2)
Comments:
1) obviously newer CMOS technology --> lower voltage
2) when 2 figures (e.g. 2.5/3.3), first is Low Power techno (low leakage,
slower), second is General Purpose techno (more leakage but
higher speed techno). For 15.4a, a good idea is to use Low Power.
Indeed the ptp V is a little less
3) normally the figure to consider is core Voltage. However a trick
exists: add one gate Oxide layer and then develop a PA final stage
powered at I/O Voltage. Obviously a little more expensive.
4) Effect of antenna may have to be considered (inductive effect
potentially causing overshoot at the PA output)
TG4a
Slide 3
Philippe Rouzet (STMicroelectronics)