Transcript Slide 1
WISP Content • Hardware Architecture • Microcontroller – MSP430F2132 – Operating Modes & Interrupts • Code – High-level States – Communication Layer Hardware Architecture Power Management Flash Memory Power Harvester Impedance Matching TI MPS430 Microcontroller Demodulator Temperature Sensor Modulator Voltage Supervisor + Voltage Regulator Antenna gets RF signal Maximize power transfer to Power Harvester RF signal rectified into DC voltage Interprets signal into bits + converts bit voltage level to be Vreg Transistor that changes antenna impedance for ‘backscatter’ • External Voltage Supervisor tells MCU when to wake up • MCU processes bits and performs Gen 2 protocol • Polls sensors to gather data Sensors and Peripherals Microcontroller MSP430F2132 Architecture General Information Frequency 16 MHz Flash/ROM 8 KB RAM 512 Bytes Information Memory 256 Bytes Clock System ACLK 32.7 MHz watch crystal MCLK Used by CPU SMCLK Used by Peripheral Modules Consumed by RFID • RAM – variables. Small chunk used • Port 1 Interrupt used for Communication. • Port 2 Interrupt used for Voltage Supervisor – can be shared • Port 3 for debugging (no interrupt capability) • 2 Timer counter interrupts (one used for communication) • Used 4 pins total out of 24 GPIO Microcontroller Operating Modes Interrupts Types • Non-Maskable: NMI pin, Oscillator fault, flash access violation • Maskable: Peripherals and WDT in Interval Mode > 1 peripheral interrupt pending simultaneously In 2132: • Comparator • Brownout Protection Available Interrupts vs. Sleep State Active Mode All Interrupts LPM0, LPM1, LPM2, LPM3 ADC, WDT, Timer, External LPM4 External • RAM • Flash …higher priority > WDT Interrupt Processing Available Clocks vs. Sleep State NORMAL GIE on by developer NESTED GIE on by developer Interrupt Service Routine Active Mode All Clocks. CPU active (~200uA/MHz) LPM0/1 All Clocks. CPU off (~30uA/MHz) • Interrupt serviced LPM2/3 DCO off. LFOSC on. CPU off (~1uA @ ~10kHz) • GIE turned on by Hardware LPM4 All disabled (0.1uA) • GIE turned off by Hardware All pre-Interrupt settings in place Interrupt Service Routine • GIE turned off by Hardware • GIE turned on by developer New Interrupt serviced w/o priority Code High-Level States Applications Layer Sufficient Voltage Generate Packet, Calculate CRC Packet Generated Insufficient Voltage Power On Reset Enter main.cpp · · Hardware Reset when supply voltage drops below ~1.6v State and Ram Retention until Hardware Reset Power Save Mode (LPM4) Harvest Power Insufficient Voltage Sufficient Voltage Commutation Layer Receive EPC State Machine Transmit Wait for Query (LPM4) Harvest Power Query Code Communication Layer Receive EPC State Machine Transmit Port 1 Interrupt & GIE Enabled Setup to Receive LPM4 No Port 1 Interrupt Timer Interrupt Enabled Enough # bits Timer value wrt bit length & encoding Yes No Correct Command Yes Process packet delimiterNotFound = 1 Timer Reset at every positive edge Each bit pushed into register Timer not reset (i.e. no bit) WISP breaks out of communication layer Port 1.1 Flip Port 1 transmit pin at timer interrupt