Transcript Keyboard

Key Board & LED Interfacing
4/4/2016
Amrita Vishwa Vidyapeetham
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External World Interfacing
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The peripheral now to be discussed – Key Board
Typical application of weak pull-ups
A key is the simplest mechanical device that can be
interfaced to a μC.
Depending on the number of keys to be interfaced and
the type of application, different approaches to interface
are available.
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Key – On/Off
ON state
OFF state
OFF state
Bounce
period
Bounce
period
Bounce Period ~ 20 ms
ON state
ON state
OFF state
Bounce
period
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Bounce
period
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Key - Bounce / Debounce
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A key is a mechanical device with spring action.
When a Key is pressed, it may take a few ms to settle to the ON
state.
In the interim period, the contact may be made and broken
repeatedly due to the vibration of the moving mechanism.
When released, it reverts to the OFF state after a similar period
of vibration.
The duration of bounce and the high frequency of vibration
associated with it depend on the key structure.
The status of the key is not clearly defined during the bounce
duration.
The key can be ‘debounced’ (the effect of bounce nullified) in
two ways - hardware or software
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Hardware Debounce - 1
5V
Thresho
ld levels
A
C
B
x
Voltage
at A
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Voltage
at x
y
R
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Voltage
at y
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Hardware Debounce - 1
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The RC time constant can be
of the order of 5 ms to filter out
bounce generated voltage
spikes.
When the key is pressed, the
voltage at point X increases
from 0V to 5V smoothly.
The buffer B has threshold
voltages for the up and down
transitions
Y changes to high state (from
the earlier low state) when the
voltage at X crosses the
threshold.
The debounce circuit behavior
is similar for the transition from
high to low state.
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5V 5V
A
AC
CB
x
Voltage
Voltage
at A
R
ThreshoThresho
Voltage Voltage
ld levels ld levels
at x
at x
R
B
xy
y
Voltage
Voltage
at y
at y
at A
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Hardware Debounce - 2
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Debouncing can be done by employing
a simple RS latch.
The latch is normally in the reset state.
When the key is pressed, the latch
changes to set state; output Q changes
from low to high state.
The instant of transition is decided by
the first spike at input which is wide
enough to make the latch set.
Once the latch is set, it remains in set
state even after the key is released.
The μC has to reset it by applying a
high state pulse at R; it is to be done
with a reasonable time gap of about 1s
after key closure.
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5V
S
Q
R
R
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Software Key Debounce
The debounce is handled by the software
program
 Usually a delay period is assumed over
which the level of the key press signal
should not change
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4x3 Keypad
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4x3 Key Pad
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In this particular example there are 12 switches
Rather than use up all these scarce I/O pins it is
hardware efficient to connect these switches in
the form of a 4×3 matrix
Without matrix – 12 I/O pins are required
With matrix, total I/O pin count is 7.
Larger keypads show an even greater efficiency
gain, with a 64-contact 8 × 8 keyboard needing
only 16 I/O pins.
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Working of 4x3 Key Pad
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The four rows are read in via RB7:4 with internal
pull-up resistors enabled.
The three columns connected to RB1:3 can be
individually selected in turn by driving the
appropriate pin low, thus scanning through the
matrix.
This is called key board scanning.
The switch contacts are normally open and, because
of the pull-up resistors, read as logic 1.
When a switch connected to a low column line is
closed then the appropriate row line is low.
Once the closed key row has been detected the
column : row intersection is known (i.e. the key that
is pressed is identified).
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Key Pad Subroutine
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Let us write subroutine SCAN_IT for scanning
a Key Pad.
SCAN_IT initializes the column count key to 1
and the column scan pattern to 11110111b.
This test vector is sent to Port B and each row is
tested in turn adding 3, 6 or 9 to the value of
key if a zero is found and loop is exited (break).
If after the four rows have been tested no
outcome has been detected, the column scan
pattern is shifted right and key is incremented.
The process is continued until either a 0 is found
or count reaches 13.
In the latter case a key value of FFh (−1) is
returned.
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Algorithm for SCAN_IT subroutine
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1. Two global variables KEY_COUNT, PATTERN
2. Key 1 is the first key
3. Set initial KEY_COUNT = 1
4. Set initial PATTERN = b’11110111’
5. Start a loop – SLOOP
6. Output PATTERN to PORTB
7. Move KEY_COUNT to W
8. Check ROW1 - RB7
9. IF zero THEN found the key, exit the subroutine with Key
identifier, ELSE increment KEY_COUNT by 3
10. Check ROW2 – RB6
11. IF zero THEN found the key, exit the subroutine with Key
identifier, ELSE increment KEY_COUNT by 3
12. Check ROW3 – RB5
13. IF zero THEN found the key, exit the subroutine with Key
identifier, ELSE increment KEY_COUNT by 3
14. Check ROW4 – RB4
15. IF zero THEN found the key, exit the subroutine with Key
identifier, ELSE increment KEY_COUNT by 3
16. If no closed key, W = -1
17. Advance KEY_COUNT one column
18. Shift (right) scan pattern once ->
19. Check - has the 0 reached RB0?
20. IF not DO another column. Go to SLOOP
21. IF yes, return with KEY_COUNT in W
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Flow chart
a
Yes
RB7 = 0
No
W=W+3
Yes
SCAN_IT
RB6 = 0
No
KEY ID = W
W=W+3
KEY_COUNT = 1
PATTERN = b’11110111
Yes
RB5 = 0
No
W=W+3
O/P
PATTERN to PORTB
Yes
RB4 = 0
No
W = KEY_COUNT
a
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W = h’FF
KEY_COUNT + 1
PATTERN >> 1
No
RB0 = 0
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Yes
KEY ID = W
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Real World Issues
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In the real world a subroutine like this would often read
in rubbish due to switch bounce
Also possibly noise induced in the connections
between keypad and the electronics.
One way of filtering out this unpredictability is
debounce subroutine – S/W
Here the state of the keypad is interrogated using the
SCAN_IT subroutine of Program
By keeping the state of the previous reading in Data
memory, any change can be detected.
Only if no change over 256 readings occurs will
subroutine GET_IT return with the keypad state.
Depending on the quality of the keypad, ambient noise
and processor speed, the outcome can be improved at
the expense of response time by including a short
delay in the loop, or by using a 2-byte stability count.
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Keypad Subroutine with debounce
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GET_IT keeps a number of tries count tally, last
reading OLD_KEY and current reading NEW_KEY
variables.
COUNT is incremented after calling SCAN_IT if the
current reading is the same as the last reading.
If not, COUNT is reset and OLD_KEY is updated.
The loop exits if count reaches 255 (8-bit register),
indicating that the last 255 readings are the same.
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Algorithm for GET_IT subroutine
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1. Three global variables COUNT, NEW_KEY,
OLD_KEY
2. Initial value of OLD_KEY& NEW_KEY is Zero
3. Initial value of COUNT is zero.
4. Call the subroutine SCAN_IT
5. Raw value returned in W is moved to NEW_KEY
6. Check if NEW_KEY = OLD_KEY
7. IF same go to STEP 9 ;
8. ELSE the readings are different, so: Make OLD_KEY
= NEW_KEY and start all over again. Go to STEP 3
9. IF readings are the same THEN Increment COUNT
10. IF not rolled around to 00 repeat ELSE we got the
key identifier.
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Flow Chart
GET_IT
NEW_KEY = 0
OLD_KEY = 0
COUNT = 0
CALL SCAN_IT
NEW_KEY = W
Yes
NEW_KEY = OLD_KEY
No
COUNT = COUNT + 1
Yes
No
COUNT = 0
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OLD_KEY = NEW_KEY
KEY_ID = OLD_KEY
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Seven Segment LEDs
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Multiplexing 7 Segment Displays - 1
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Multiplexing 7 Segment Displays - 1
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Assuming each display requires eight lines (seven
segments plus decimal point) then a budget of 8 × n
parallel lines are required for an ndigit display.
The straightforward solution to this problem - a 3-digit
display is driven from three parallel registers on a single
bus.
The principle can be extended to six or more digits using
the appropriate number of registers.
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Multiplexing 7 Segment Displays 2
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Multiplexing 7 Segment Displays - 2
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An alternative approach, is frequently used with LED-based
displays.
Instead of using a register for each digit, all readouts are
connected in parallel to the one PIC port.
Each readout is enabled in turn for a short time with the
appropriate data from the output port.
Provided that the scan rate is greater than 50 per second
(preferably greater than 100) the brain’s persistence of vision
will trick the onlooker into visualizing the display as flicker free.
Of course this is how the brain interprets a series of 24 still
frames per minute in a movie, each shown twice, as a moving
image.
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Main program run
sequence N
Main program run
sequence N+1
Main program run
sequence N+1
P
Reset
WDT
P
Reset
WDT
Reset
WDT
Reset
WDT
(a)
Main program run
sequence N+1
Main program run
sequence N+1
P
P
Reset
WDT
Reset
WDT
S
Malfunction processor stops;
WDT continues
operation
WDT times out
& resets the
processor;
Processor starts
afresh
(b)
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During normal operation, a WDT time-out
generates a device RESET.
If the device is in SLEEP mode, a WDT time-out
causes the device to wake-up and continue with
normal operation, this is known as a WDT wake-up.
The WDT can be permanently disabled by clearing
the WDTE configuration bit.
The postscaler assignment is fully under software
control,
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WDT Period
The WDT has a nominal time-out period of 18 ms,
If longer time-outs are desired, a postscaler with a division ratio of
up to 1:128 can be assigned
Thus, time-out periods of up to 2.3 seconds can be realized.
The CLRWDT and SLEEP instructions clear the WDT and the
postscaler (if assigned to the WDT).
and prevent it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon a Watchdog
Timer time-out (WDT Reset and WDT wake-up).
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