Transcript EE362L_PWM_H_Bridge_Inverter

H BRIDGE
Switching rules
• Either A+ or A– is always closed,
but never at the same time *
Vdc
A+
B+
• Either B+ or B– is always closed,
but never at the same time *
*same time closing would cause a
short circuit from Vdc to ground
Va
Load
A–
Vb
Corresponding values of Va and Vb
B–
• A+ closed, Va = Vdc
• A– closed, Va = 0
• B+ closed, Vb = Vdc
• B– closed, Vb = 0
H BRIDGE
Corresponding values of Vab
•A+ closed and B– closed, Vab = Vdc
Vdc
•A+ closed and B+ closed, Vab = 0
•B+ closed and A– closed, Vab = –Vdc
A+
Va
B+
Load
A–
Vb
B–
•B– closed and A– closed, Vab = 0
• The free wheeling diodes permit current
to flow even if all switches did open
• These diodes also permit lagging
currents to flow in inductive loads
But is a square wave output good enough? Not for us! Sinusoidal load
voltage is usually the most desirable. But how do we approximate a
sinusoidal output with only three states (+Vdc, –Vdc, 0) ?
The answer: Unipolar PWM modulation
Vcont
Vtri
–Vcont
Vcont > Vtri , close switch A+, open
switch A– , so voltage Va = Vdc
Vcont < Vtri , open switch A+, close
switch A– , so voltage Va = 0
–Vcont > Vtri , close switch B+, open
switch B– , so voltage Vb = Vdc
–Vcont < Vtri , open switch B+, close
switch B– , so voltage Vb = 0
Figure 1. Vcont , –Vcont , and Vtri
A+ closed, A– open, so Va in Figure 2 = Vdc. Else A– closed, A+ open, so Va = 0.
B+ closed, B– open, so Vb in Figure 2 = Vdc. Else B– closed, B+ open, so Vb = 0.
–Vdc
Idealized Load Voltage (Va – Vb) Waveform
0
Vdc
1.5
1
0.5
0
-0.5
-1
-1.5
1.5
1
0.5
0
-0.5
-1
-1.5
ma = 0.50
(linear region)
2
1.5
1
0.5
0
-0.5
-1
-1.5
-2
1.5
1
0.5
0
-0.5
-1
-1.5
ma = 1.5
(overmodulation
region)
V1rms
asymptotic to
square wave
value
4 Vdc


2
V dc
2
0
ma
1
linear
overmodulation
saturation
Figure 6. Variation of RMS value of no-load fundamental inverter
output voltage (V1rms ) with ma
Table 1. Load voltage harmonic RMS magnitudes with respect to
V dc
2
Harmonic
ma =
0.2
ma =
0.4
ma =
0.6
ma =
0.8
ma =
1.0
1 (fundamental)
0.200
0.400
0.600
0.800
1.000
2mf ± 1
0.190
0.326
0.370
0.314
0.181
0.024
0.071
0.139
0.212
0.013
0.033
2mf ± 3
2mf ± 5
4mf ± 1
0.163
0.157
0.008
0.105
0.068
4mf ± 3
0.012
0.070
0.132
0.115
0.009
0.034
0.084
0.119
0.017
0.050
4mf ± 5
4mf ± 7
(for large mf )
2mf cluster
4mf cluster
V(A+,A–) V(B+,B–)
500Ω
trimmer
+12Vdc regulated from 2W,
DC-DC converter output
These ½W resistors can get hot - keep them off
the surface of the protoboard
1.5kΩ, ½W
red
1kΩ
High-pass filter to
block DC
red
red
100kΩ
0.01µF
1kΩ
1.5kΩ, ½W
Filtered and
buffered
triangle wave
blue
270kΩ
Vcont
blue
7
1
Waveform Gen.
blue
8
0.01µF
(freq. control)
–12Vdc
regulated from
2W, DC-DC
converter output
14
8
Approx
22kHz
triangle
wave
5
Op Amp
1
8
green
5
1kΩ
Comp
4
1
4
violet
10kΩ
8.2kΩ
The IC is upside
down to minimize
wiring clutter
–Vcont
5kΩ
trimmer
270kΩ
1kΩ
blue
blue
Vcont
green
violet
See Appendix for IC pin configurations
(For control electronics wiring with solid
#22 wire, use green for ground, red for
+12Vdc, violet for –12Vdc, and blue for all
others)
violet
violet
Protoboard common connected to common of
2W, DC-DC converter output
Figure 7. PWM inverter control circuit
(note – be sure to use the wiring color code to
make troubleshooting easier)
green
Vcont
60Hz AC signal from AC wall
wart and 500Ω potentiometer
You will build this
part the following
week
Jack for
DC wall
wart
500Ω pot for
adjusting Vcont
+12Vdc isolated rail
4”
2W, DC-DC
converter
Jack for
AC wall
wart
–12Vdc isolated rail
Protoboard common
(i.e., the green wires)
Figure 8a. The 10” long piece of 1” x 6” wood piece with inverter control circuit mounted in the lower 4”
Isolated outputs from 2W, DC-DC
converter (red = +12V, violet = –12V,
green = common)
+12Vdc isolated rail (red)
Input from
12Vdc
regulated
wall wart
2W, DC-DC
converter
–12Vdc isolated
rail (violet)
Mount triangle wave generator
IC upside down to minimize
wiring clutter
Protoboard common (i.e., the green wires)
Figure 8b. Zoom-in of protoboard
Zoom-in of DC-DC
converter
Triangle wave generator
Dual Op Amp
Dual Comparator
Approx. equal rise
and fall times
Figure 10. Rise and fall times of the triangle wave
Figure 12. Output control voltages V(A+,A–) and V(B+,B–), with respect to protoboard
common, with Vcont = 0 (i.e., the ma = 0 case)
Figure 15. Idealized Vload, with ma just into the overmodulation region
Figure 16. Idealized Vload observed in the scope averaging mode, with ma in the linear
region
Figure 17. Idealized Vload observed in the scope averaging mode, with ma just into the
overmodulation region
Figure 18. Idealized Vload observed in the scope averaging mode, with ma almost into
the saturation (i.e., square wave) region
2mf cluster (46kHz)
4mf cluster
(92kHz)
60Hz
component
Figure 19. FFT of idealized Vload in the linear region with ma ≈ 1.0, where the
frequency span and center frequency are set to 100kHz and 50kHz, respectively
Figure 23. Near saturation, the 3rd harmonic magnitude is 0.30 of the fundamental
Figure 24. Near saturation, the 5th harmonic magnitude is 0.13 of the fundamental
Wait until
next week
One firing circuit for each MOSFET, with each firing
circuit mounted on a separate protoboard. A– and B– can
share a power supply and ground. A+ and B+ must each
use separate power supplies and grounds. Do not
connect any of these grounds to the ground of the
control circuit.
MOSFET
G
D
S
100kΩ
green
10Ω
1.2kΩ
Grounds (isolated
from control circuit)
0.1µF
blue
5
4
green
Driver
8
A+ and B+ use inverting drivers.
A– and B– use non-inverting
drivers. The optocouplers provide
an additional inversion.
1
blue
red
green
5
4
Opto
10kΩ
blue
8
Outline of
protoboard
blue for A+,B+,
violet for A–,B–
1
Powered by +12Vdc regulated supply
(isolated from control circuit)
O+ O–
(see Figure 2 for connections)
Figure 1. Isolated firing
circuit with optocoupler
and gate driver
A–
Firing
A+
Firing
O+ O–
B+
Firing
O + O–
O+ O–
O+ O–
blue
blue
violet
8”
B–
Firing
Optically-isolated firing
circuits. Mount drivers
near the MOSFETs
Individual protoboard for
each firing circuit
violet
blue
Jack for
DC wall
wart
–12Vdc
regulated
V(A+,A–) V(B+,B–)
Control Circuit from Previous Lab
Jack for
AC wall
wart
Figure 2. Physical layout of firing circuits
opto and driver are powered by a 12Vdc isolated DC-DC
converter. Likewise, B+ has a 12Vdc isolated DC-DC converter.
A– and B– are powered by the DC wall wart.)
(A+
Figure 3. Layout of inverter control circuit and isolated firing
circuits
Figure 4. Zoom-in view
of A+ and A– isolated
firing circuits
DC-DC converter
for A+
Pin configuration for 6N136 optocoupler
Input from 12Vdc
wall wart
Isolated output
V(A+,A–) – V(B+,B–) with control circuit driving optos
V(A+,A–)
Opto A+ output
V(A+,A–)
Opto A– output
We want the
opto output
waveforms to
look identical in
this test in order
to preserve
symmetry in
firing
Opto A+ output
Opto A– output
V(A+,A–)
A+ driver output
V(A+,A–)
A– driver output
We want no overlap in driver “on” times, so there will be no idling current
A+ driver output
A– driver output
After finishing A+ and A-, perform same checkout for B+ and B-
H-Bridge and Filters
–
Vac (Output)
+
b
–
Vdc
+
a
MOSFET
A+
MOSFET
A–
MOSFET
B+
MOSFET
B–
A+
Firing
A–
Firing
B+
Firing
B–
Firing
O+ O–
O+ O–
O+ O–
O+ O–
blue
blue
violet
blue
Jack for
DC wall
wart
Individual heat
sink for each
MOSFET
violet
–12Vdc
regulated
V(A+,A–) V(B+,B–)
Control Circuit from Previous Lab
Jack for
AC wall
wart
Figure 1. Physical layout of inverter
–
Vdc
+
10µF, 50V,
highfrequency
capacitor
Vdc Input Power
Point “b” in H-bridge
–
10µF, 50V, bipolar,
high-frequency
capacitor
Vac
+
100µH, 9A or 10A
inductor
Point “a” in H-bridge
Figure 2. Zoom-in of filter details for Vdc input and Vac output sections of Figure 1
(points “a” and “b” correspond to the two sides of the inverter output)
–
–
Vdc
Vac
black
+
+
red
orange
blue
G
D S
A+
G
A–
D S
G
B+
D S
G
D S
B–
Figure 3. H-Bridge wiring color scheme (using #16 stranded)
(note – wire crossings are not connected)
blanking time to
eliminate overlap
actual MOSFET
turn on
VGS of A+
VGS of A–
A+ off
A+
on
A– on
A–
off
+
VDS of A+
–
–
VDS of A–
+
Note - the added vertical
bars show slight overlap
in “on” times, but only
during the transitions.
B+ off
B+
on
B– on
B–
off
+
VDS of B+
–
–
VDS of B–
+
Vac, without and with
filter
Vac with Vcont near saturation