transparencies - Indico

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Transcript transparencies - Indico

Lessons from May 2003 beam-tests:
what we can fix, as known
Data of M4R1 (Ferrara) will be used
M3R3 (Frascati) will be commented
10 September 2003
A.Kashchuk (Roma2, PNPI)
1
Schematics of interconnections in the upgraded M4R1 system
More explanation
in ‘Grounding’ section
Note: system was absolutely stable during measurements
10 September 2003
A.Kashchuk (Roma2, PNPI)
2
Lesson:
The shown schema was tested
with M4R1 prototype,
It was well operating
and can be considered as a
base line conception
10 September 2003
A.Kashchuk (Roma2, PNPI)
3
Lesson:
LVDS cables
10 September 2003
A.Kashchuk (Roma2, PNPI)
4
Compare shielded (12m) and unshielded (5m) cables
Efficiency in 20ns time window and time resolution
mixture Ar/CO2/CF4 (40/40/20%), TH=6.5fC, beam 120kHz
95%
99.5%
Note:
Practically
no difference,
if compare
to unshielded cables
4.5ns
3.0kV
10 September 2003
3.15kV
A.Kashchuk (Roma2, PNPI)
5
 Unshielded flat LVDS cables (16 tw.p.) were routed
along grounded support and were well pressed to it
on distance of about 1m,
 No ‘ground’ lines in LVDS cables
 Shielded cables were no routed:
kept in turns near the chamber at distance 1.5m
 Shield of each cable (16 tw.p.) was connected to
grounded support (not to FC directly, then to FC
in one point),
see Grounding section for better explanation
10 September 2003
A.Kashchuk (Roma2, PNPI)
6
Unshielded flat cables
have to be rejected,
because can not be routed by correct way
on real Muon Station
10 September 2003
A.Kashchuk (Roma2, PNPI)
7
How LVDS cables can inject noise?
No grounded support,
and coupling directly
to FC
If cables pressed to
grounded support,
one increase C2 and Q2
Q=const
C2
C1
C2
C1
Chamber inside
Chamber inside
Coupling: C1-> connector pin-to-FEE_gnd More coupling wire-to-ground
C2-> tw.pair-to FC
C2>>C1, Q2 well increasing,
Q1=Q-Q2, where Q1-is charge
if cables have
injected as a noise
grounded shielding
Q2-’compensating’ charge
Note: to split C1 an additional Copper layer on board is used in ASDQ++
10 September 2003
A.Kashchuk (Roma2, PNPI)
8
Lesson:
Bursts of noise counts
and additional dark current
Digital (blue)
Analog (yellow)
100ns/div
On statistics it looks as ‘huge’ charges of both polarities
with BLR-defect for one polarity.
Not reproduced by injector…
10 September 2003
A.Kashchuk (Roma2, PNPI)
9
Historical review:
Bursts in noise counts were observed (in all channels as 100%
correlated) in various prototypes (CERN, Rio, Ferrara), and
specified as signals of ‘unknown nature’.
At HV below 1.5-2kV noise count zero, i.e. there is threshold.
At present we suppose (it has to be proved with perfect design)
that bursts can be due to discharges outside of the chamber.
Bad isolation and using simple wires in HV distribution could be
the reason. Electric fields of about E=100 kV/cm can be created
in multi-wire conductor around 0.1mm single wires.
Note:
M3R3 chamber built in LNF in 2003 has no bursts.
It has HV-bus filled by SYLGAR and wires in teflon isolation
are using in connections groups of HV resistors to the HV-bus.
Bursts in noise counts were never observed in PNPI prototypes.
10 September 2003
A.Kashchuk (Roma2, PNPI)
10
Grounding equivalent diagram
(updated by author)
Inductances in return signal path cancelled
Dummy inputs introduced
Detector gnd and FEE gnd connected to FC at many points
One point (small area) on chamber for grounding all ‘stuff’
10 September 2003
A.Kashchuk (Roma2, PNPI)
11
1 channel
length?
L?
neglect
Qinj=Vnoise(Cdet+C1-C2)=0, if C2=Cdet
Note: C2=Cdet will be used in the final FEE
Vnoise TH

QTH
 65V for QTH  6.5 fC, Cdet  100 pF
Cdet
10 September 2003
A.Kashchuk (Roma2, PNPI)
12
Low Voltage Power Supply
and Voltage Regulators
Power Supply (PS) has to be isolated (means from DAQ ground)
and connected to DAQ ground by one wire per Muon
Station, as shown in Grounding section;
If PS remote from FEE (5-10m), Vref=0V is move from FEE_gnd:
inductance L? (see slide 21) in the line appears;
In this case (if no Voltage Regulators) the line must have
min inductance (large cross-section) and max coupling to
grounded surface, i.e. routed along grounded surface and
well pressed to it (but not along FC);
Local Voltage Regulators remove inductance (shown as L?)
and provide ‘ideal’ local Vref=0V on the FEE_gnd.
10 September 2003
A.Kashchuk (Roma2, PNPI)
13
Lesson :
Final chamber enclosure
see LNF design for the reference,
it has to be the base line solution
10 September 2003
A.Kashchuk (Roma2, PNPI)
14
EXtraBoard proposed by LNF for CPCs
with some improvements by AK, as shown below
Mounted on
all FEE boards
10 September 2003
A.Kashchuk (Roma2, PNPI)
15
New features with EXB:
 Standard solution for all CPC configurations
(both SCR0 and DCRO);
 Standard and simplified SPB with one 2-raw connector
replaced 4 SMD single raw connectors;
 Multiple grounding in the system: ‘FC-FEE’;
 Elegant mechanical fixation of all FEE boards on chamber
Note: pins (Male) have to be mounted on chamber (not Female)
10 September 2003
A.Kashchuk (Roma2, PNPI)
16