Transcript Global convergence analysis of mixed

Analysis on Performance Controllability
under Process Variability:
A Step Towards Grid-Based Analog Circuit
Optimizers
Seobin Jung
Mixed-Signal IC and System Group
Seoul National University, Korea
July/2011
Challenges
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Current analog circuit optimizers need to explore a
continuous, high-dimensional design space.
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They are often stuck in a local minimum.
It takes a long time for simulation to be ended.
Designers can not be sure whether the solution is global
optimum or not.
Complexities and variabilities in deeply-scaled devices
pose bigger challenges.
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well-proximity effects, stress effects, and aging effects
It’s difficult to model them precisely as a set of equations.
Leveraging Process Variability
Under PVT variation and uncertainty, one design has to be
sufficiently different from another to be distinguished by their
performance metrics.
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Performance P = TP [psec]
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Performance P = TP [psec]
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Wp
Wn
70
60
50
0
(a)
30
60
Design Parameter D = Wp [λ]
Simulation Settings
65nm CMOS (1λ = 30nm)
Process: TT
Voltage: 1.2V
Temperature: 25C
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60
40
0
(b)
30
60
Design Parameter D = Wp [λ]
90
Simulation Settings
Process variation: TT, SS, FF
Voltage variation: 1.08~1.32V
Temperature variation: -40~110C
Random Device Mismatch
Derivation of Minimum Grid Spacing (1)
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Modeling a noisy circuit as a Communication Channel.
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Signal to Noise Ratio is defined as the ratio of S to N.
S = performance variation due to design parameter variation
N = performance variation due to PVT variation and mismatch.
Derivation of Minimum Grid Spacing (2)
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Channel Capacity Theory
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Shannon derived the required SNRmin to transmit N-bit digital
information error-free.
1-bit information(N=1) corresponds to distinguish two
design points by their difference in performance.
Experimental Results
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Ring Oscillator
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Performance P = Oscillator Period
Design Parameter D = Wload
Fixed Value
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Wring = 20λ
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Differential Amplifier
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Performance P = DC gain
Design Parameter D = W
Fixed Values
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R = 10kΩ, Wtail = 20λ
Advantage of Using Grid
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The design space can be covered by finite discrete samples.
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It can prevent optimizers from wasting computational efforts.
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E.g., with a 20% log-scale grid, a 10 range require only 13 samples.
Modern optimizers repeatedly evaluate similar design points to get
meaningless precision or to get better local optimum.
Global optimum could be found by grid-based search.
Conclusion
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In presence of process variability and uncertainty,
grid-based analog circuit optimizer may be a viable
approach.
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The continuous design space can be transformed into the
discrete design space.
For a few common circuits, the minimum grid spacing
required was quite coarse. (~20%)
Since the concept of coverage can be defined, this approach
can be extended to other researches.