Transcript Analogue Digital Conversion

Analogue to Digital Conversion
Digital Signal Processing
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A digital signal is an approximation of an analog
one
Levels of signal are sampled and converted to a
discrete bit pattern.
Resistor networks can be used to convert digital
signals into analogue voltages
Step (discrete) approximation
“stair-step”
approximation of
original signal
sample
level
more samples give greater accuracy
time
hold time for sample
This Lecture
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Methods of analogue to digital conversion
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flash
counter ramp
successive approximation
Sample interval and aliasing problems
Sample and hold circuits
The Comparator
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if A > B the comparator output is in one logic state (0, say)
if B > A then it is in the opposite state (1, say)
A comparator can be built using an op amp with no
feedback
analogue
input
reference
voltage
-
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Most A-D converters use a comparator as part of the
conversion process
A comparator compares 2 signals A and B
+
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Flash Converter
6V
+
encoder
+
4V
+
E
0
0
0
0
0
1
1
1
F
0
0
0
0
0
0
1
1
G
0
0
0
0
0
0
0
1
000
001
010
011
100
101
110
111
2V
1V
-
D
0
0
0
0
1
1
1
1
+
C
0
0
0
1
1
1
1
1
B
-
B
0
0
1
1
1
1
1
1
3V
+
A
0
1
1
1
1
1
1
1
Encoder Output
C
-
Comparator Outputs
D
-
Converter
input
range (V)
<1
>1-2
>2-3
>3-4
>4-5
>5-6
>6-7
>7
E
-
5V
F
-
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7V
+
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Uses a reference and a comparator for each
of the discrete levels represented in the digital
output
Number of comparators = number of
quantisation levels
Not practical for more than 10 bit converters
generally fast but expensive
-
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+
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G
input signal
A
digital
output
Counter-ramp Converter
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A signal (conversion request) is sent to the converter and the counter is
reset to zero
a clock signal increments the counter until the reference voltage
generated by the D-A converter is greater than
the analogue input
At this point in time the output of
analogue input
the comparator goes to a
logic 1, which notifies the
control logic the
comparitor
conversion has finished
D-A
Converter
The value of the counter
is output as the digital
value
-
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Comprises a D-A converter, a single comparator, a counter, a clock
and control logic
When a conversion is required
+
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Counter
clock and
control logic
Counter-ramp Converter
conversion
request
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The time between the start and
end of the conversion is known
as the conversion time
A drawback of the counter-ramp
converter is the length of time
required to convert large
voltages
We must assume the worst case
when calculating conversion
times
comparitor
output
d.c input voltage
D-A converter
output
0
1
2
3
4
5
6
6
6
6
6
6 counter output
clock
Successive Approximation Converter
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contents of register cleared
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Vin
Vd = 0
MSB set to a 1
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analogue input
if Vc = 0 then Vd < Vin
=> leave MSB set
if Vc =1 then Vd > Vin
=> clear MSB
Repeat previous step for other bits
in MSB to LSB order
Vc
-
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Counter replaced by a register
Contents of register decided by clock and control logic
When a conversion is required:
+
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D-A
Converter
4-bit reg
b3 b2 b1 b0
Vd
comparitor
clock and
control logic
The successive approximation A-D
converter
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Example:
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A 4-bit successive approximation A-D converter has a
full-scale input of +15V. Show how the A-D converter
would convert the analogue voltages 10.9V and 3.1V
into their digital equivalents
Total conversion time = n+1 cycles where n = the
number of bits in the code word
ADC Conversion Error
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Assume D-A converter output
has stepped up to V1.
Because Vi > V1, the output
has stayed at a logic 0.
On the next clock pulse the DA output rises to V2.
V2 > Vi, comparator output
becomes logic 1 and
conversion is completed.
Maximum possible error = q.
V2
VI
V1
Quantisation
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Output from an A-D converter can
only be one of a limited number of
possible codes
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Hence quantisation errors will arise.
Possible to reduce this error to half by
adding q/2 to the output of the D-A
converter
Equivalent of “rounding” decimal
numbers.
7V
111
6V
110
5V
101
4V
100
3V
011
2V
010
1V
001
0V
000
7V
6V
5V
4V
3V
2V
111
110
101
100
011
010
1V
0V
001
000
Quantisation
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Quantisation errors can be reduced by increasing
the number of bits
Common for A-D converters to have 16 bit or
better resolution
However the accuracy of the reference voltage
must be of the same precision
Example:
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Consider a A-D converter where Vref is only accurate to
within 1%
Summary
De vice
Flash
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Count er ramp
Sucessive approx
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C omm e nt
fast and expensive
simple but slow
widely used
C on vers ion ti me
Best Average Worst
1
1
1
1
2n/2
2n
n+1
n+1
n+1
One way to reduce quantisation errors is to use a larger number
of bits in the codeword
absolute accuracy of conversion may not be as good as the
resolution if the error tolerance for reference voltages gets too
large
A multiplexer enables one A-D converter to be switched between
several signal inputs
Multiplexers
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The A-D converters described above have all been single-input
devices
It is often necessary to convert several analogue signals to binary
code words
Integrated circuit multiplexers are available which can select one of
its analogue inputs at a time and present it to a single A-D
converter
1
Analogue
inputs
2
3
Selected
analogue
output
4
digital
control
lines
switch decoding
logic
Conversion of a.c. signals
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The A-D converters that we have looked at present no special
problems with d.c.
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Example consider reading room temperature and plotting
against time
Not possible to sample at every instant in time
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What about a.c. signals?
rate at which we take samples is known as the sampling rate
sampling too fast can be
inefficient
temp
A3
A2
A1
time
Conversion of a.c. signals
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Sampling too slowly can cause information to be lost
temp
A2
A1
t1
t2
time
Sample Time vs Frequency
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Consider what happens when the signal
frequency is higher than the sampling
frequency.
voltage
time
sample frequency is number of samples / second
Conversion of a.c. signals
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Effects of under-sampling
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possible to interpolate high
frequency components as
low frequency ones
these errors are said to be
caused by aliasing
important to preceed A-D
converter with a low pass
filter to remove high
frequencies
known as an anti-aliasing
filter
voltage
time
Sample frequency must be at least twice
the highest signal frequency (2f is also
called the Nyquist Frequency).
Example
What
is the maximum frequency of input signal
that can be converted by an A-D convertor with a
conversion time of 0.25 mS?
samples
per second = 1000 / 0.25 = 40,000
Maximum
frequency in input signal has to be
half this or 20kHz.
Sample-and-hold devices
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Sampling rule tells us at what rate to make conversions, but there
is still another problem associated with changing signals
voltage
t1
t2
time
Sample-and-hold devices
voltage
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t1
t2
time
To remove the problem a sample and hold device which
samples the input and holds this value until the end of the
conversion is often used
switch
storage
capacitor
Sample-and-hold devices
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A number of problems exist with the previous sample
and hold circuit
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load placed on the input of the circuit by charging the
capacitor during the sample phase
current flowing from the capacitor used in the conversion will
reduce the voltage stored on the capacitor
+
+
C
sample/hold
control line
What you should be able to do
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Explain the operation of binary weighted resistor and R2R ladder networks. Recall their general layout.
Calculate the output voltage given an input 4-bit value.
Explain quantisation with reference to D-A conversion.
Explain the operation of flash, counter ramp and
successive approximation A-D convertors. Recall their
general layout.
Recall their conversion time relative to number of bits
required.
Explain quantization with reference to A-D conversion.
Explain the aliasing problem and the relationship
between sample rate and input signal frequency.