Transcript PRESENTATION NAME

Function Generator
Controller (FGC3) for
power converter
controls in the PSB
CERN Operator Training 2012
Quentin King
TE-EPC-CC
With thanks to all my colleagues
in TE-EPC, BE-OP and BE-CO
who have collaborated on the
FGC project.
2
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
3
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
1 Corrector circuit converter renovation in the PSB
4
• There are 488 corrector magnets
organised in 254 circuits.
• The 146 existing power converters were
installed between 1972 and 1978.
• They use many bipolar transistors in
parallel to regulate the current from a
common 30V DC-bus.
• 4-quadrant operation is achieved using
a mechanical polarity switch, which
only allows a few inversions per year.
• They are controlled by CAMAC, shared
GFA’s and hybrid single transceivers
since 1980.
• Only 8 different functions are available
for all the corrector circuits.
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1 Corrector circuit converter renovation in the PSB
5
• Old linear converters to be replaced by
new switched-mode “ACAPULCO”
converters
• 32 ACAPULCO converters will be used for
dipole corrector circuits
• 82 ACAPULCO converters will be used for
the multipole corrector circuits
FGC_Ether
Gateway
FGC_Ether
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1 Corrector circuit converter renovation in the PSB
6
• As now, there will be many more
circuits (254) than converters (114).
• Patch cables are used to link to the
circuits that are currently required
to a converter.
• An FGC “device” is defined in the
database for every circuit. E.g.
BR1.DHZ3LY
• The identity of a circuit is linked to
an FGC3 MAC address dongle:
To Magnets
Patch
cables
From converters
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1 Corrector circuit converter renovation in the PSB
7
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Installation schedule
physics
10.2011
Tech. Stop
11.2011
8 PCs with
FGC3s installed
on dipole circuits
12.2011
Working sets
interface
implemented
and debugged
01.2012
physics
02.2012
24 additional PCs with FGC3s
installed on air-cooled dipole
circuits
Water-cooled dipoles magnets
connected to the WIC system
03.2012
04.2012
Post Mortems
and alarms
implemented
and debugged
physics
08.2012
09.2012
10.2012
05.2012
06.2012
07.2012
Oasis interface
implemented
and debugged
LS1
11.2012
Dipole circuits
fully validated by
OP
12.2012
01.2013
02.2013
Old multipole
magnets PCs
and control
dismantled
03.2013
04.2013
82 Additional
PCs with FGC3s
installed on
multipole circuits
05.2013
Consolidated
system
commissioned
and ready for
operation
1 Corrector circuit converter renovation in the PSB
8
Questions
1.
After the renovation, the number of dipole and
multipole corrector circuits will be:
a. Less than the number of power converters
b. More than the number of power converters
c. The same as the number of power converters
2. The power converter renovation is being done in two
steps. In the first step in 2012:
a. The converters for the dipole corrector circuits are
being replaced
b. The converters for the multipole corrector circuits
are being replaced
c. The converters for a mix of dipole and multipole
circuits are being replaced
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9
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
2 Overview of power converter control
10
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What is a Power Converter?
TYPE 1
•
•
•
•
TYPE 2
Continuously regulated voltage
source based on:
• Linear amplifier, or
• Switching of AC or DC.
Outer current regulation loop.
Current reference can be:
• Static (DC).
• Pulsed – i.e. a steady current
is only required for a short
time per cycle.
• Waveform – the current must
be correct all the time.
•
One FGC3 software class
(FGC3_PC) will control all types of
continuously regulated power
converter.
•
•
•
Fast pulsed voltage source based
on capacitive energy discharge.
In more demanding cases the
current is regulated during the
short flat top (~2ms), in other
cases it is open-loop.
Current reference is always pulsed.
One FGC3 software class
(FGC3_FP_PC) will control all types
of fast pulses power converter.
2 Overview of power converter control
11
82
In this talk I will focus on the first converter to be controlled by
the FGC3 which belongs to Type 1: ACAPULCO
±30 V
±50 A
Iout
AC
Mains
Supply
Power Part
(Voltage Source)
Vout
• « Voltage amplifier »
• Magnet Protection
Cooling
System
Vref
Control
• Voltage Source State Control
• High Precision digital current loop
• Communication with CCC
Gateway
Magnet
Protection
digital
.... analog
Digital Electronic (FGC3)
Ethernet
Timing
I ref
A B
AC Mains Supply
I.A
I.B
Current
Transducers
head & electronic
Earth
Circuit
AC Mains Supply
timing
CCC
Magnet Protection Detection system & General Interlock Controller
2 Overview of power converter control
12
What does it take to control a type 1 power converter?
•
•
•
•
•
•
•
•
•
•
•
•
State control: ON, OFF, RESET
Diagnostics – record first fault in case of trip
Current reference generation – requires timing and cycle user etc…
Current measurement – DCCT
Current regulation – Analogue or Digital
Acquisition of current measurement
Voltage measurement – Voltage divider
Voltage regulation – Analogue or Digital
Firing control
Acquisition of voltage measurement
Logging of signals in case of trip (post mortem)
Generation of Alarms
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2 Overview of power converter control
13
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Differences between existing control and FGC3 for the PSB converters
Activity
Existing PSB controls
New FGC3 controls
State control
G64 CPU
FGC3
First fault Diagnostics
LEDs on front panel
FGC Diagnostic Interface
Module (DIM)
Current reference generation
GFAS with to CAMAC hybrid
single transceivers
FGC3 software
Timing and events
CTRV timing card
in the VME crate
CTRI timing card in
the FGC gateway
Current regulation
Analogue
FGC3 software
Acquisition of current
measurement
Sampler + OASIS
FGC3 analogue interface +
OASIS
Logging of post-mortem
signals
None
FGC3 software
Generation of alarms
GM class in MIL1553
gateway
FGC class in FGC_Ether
gateway
2 Overview of power converter control
14
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In summary, with the FGC3:
• Function generation and acquisition are moved from external systems
into the FGC.
• Timing and event reception passes via the FGC gateway
• Current regulation is done digitally in software:
Iref
Vref
DAC
F(z)
ACAPULCO
Voltage
Source
Vload
Iload
Imeas
FGC3
ADC
2 Overview of power converter control
15
FGC State Machine
•
•
•
•
•
•
•
•
This state machine is used in the LHC power converters.
It was extended to support cycling in the PS MPS and POPS.
It is now used in the new SPS MUGEF software that
will be installed during LS1.
It supports non-cycling reference
functions: IDLE, ARMED, RUNNING.
It supports cycling reference
functions: TO_CYCLING,
CYCLING, POLARITY.
The state machine combines
converter states (OFF,
STARTING, STOPPING, …)
and reference generation
states (IDLE, ARMED,
RUNNING, CYCLING).
Not all transitions are used in all
cases.
ON_STANDBY can have different
behaviours according to the type of
converter.
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2 Overview of power converter control
16
ON_STANDBY State
•
The ON_STANDBY state in the LHC was required to lock the
current reference at the minimum value for the converter.
•
In the PS complex, ON_STANDBY normally
blocks the converter firing resulting
in ZERO current.
•
In some cases it may also
open the circuit to remove
the magnet’s inductance from
influencing other coupled
magnets.
•
In other cases it may ground
the circuit.
•
This will be configurable with the FGC3
so the same software class will be able to
support all these ON_STANDBY behaviours.
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2 Overview of power converter control
17
SLOW_ABORT State
•
The SLOW_ABORT state was essential for the LHC where
circuits can have a LOT of energy.
•
It smoothly ramps down the current reference to the
minimum value before switching off the
converter.
•
This protects the
superconducting magnets
and also the converter’s
circuit breaker from
unnecessary openings
at high power.
•
Although less essential
for warm circuits it is
always a good policy to stop
a converter using SLOW_ABOUT.
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2 Overview of power converter control
18
FLT_STOPPING State
•
A FAULT is defined as a condition that must cause the
converter to stop.
•
If any fault is detected when the converter is running,
then the state will change to FLT_STOPPING
and the converter will shut down.
•
Once the power has been
disconnected and any
stored energy has been
discharged the state
can then change to
FLT_OFF.
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2 Overview of power converter control
19
FLT_OFF State
•
If any fault is detected when the converter is not running,
then the state will FAULT_OFF and it is NOT possible to
restart the converter from this state.
•
All FAULTS are LATCHED.
•
To restart the converter the
fault condition must be
cleared AND the fault
latch must be RESET.
•
This will allow the state
to change to OFF, from
where it is possible to
start the converter.
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2 Overview of power converter control
20
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Reference Generation
Depending on the type and use of a power converter the reference can be:
• DC set-point controlled using a knob
• Pulsed current reference controlled using a knob
• Waveform reference from a GFAS controlled using the function editor
• Waveform reference from an FGC3 controlled using a function editor or knobs
2 Overview of power converter control
21
Reference Generation in an FGC
The FGC software includes a function generation library that supports ten different
types of reference function:
Name
Cycling Function description
PLEP
No
Single parabola-linear-exponential-parabola segment
PPPL
Yes
Multiple parabola-parabola-parabola-linear segments
TABLE
Yes
Table interpolated with linear segments
SPLINE
Yes
Table interpolated with parabolic splines
LINEAR
No
Single linear segment in a given time
CUBIC
No
Single cubic segment in a given time
SINE
No
Sine with optional window for a smooth start and end
COSINE
No
Cosine with optional window for a smooth start and end
SQUARE
No
Offset square wave
STEPS
No
Staircase of one or more steps
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2 Overview of power converter control
22
Function Generation Library
PLEP
The PLEP function is special because
it can be initialised with a non-zero
gradient. This is useful because it is
able to move the current reference
for a power converter from any
value to any other value while
respecting all the converter limits. It
can therefore be used to abort a
running function.
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2 Overview of power converter control
23
Function Generation Library
PPPL
The PPPL reference was created for the CERN
PS main magnet controls. The field is
ramped up in stages with a series of linear
plateaus defined parametrically using seven
values.
These specify a fast parabolic
acceleration followed by a slow parabolic
deceleration, then a fast parabolic
deceleration and finally a linear section that
is not necessarily constant.
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2 Overview of power converter control
24
Function Generation Library
TABLE and SPLINE
The same table of
time versus
reference can be used with linear
interpolation (TABLE) or parabolic
spline interpolation (SPLINE).
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2 Overview of power converter control
25
Function Generation Library
LINEAR and CUBIC
LINEAR and CUBIC trim functions are
useful for small changes in the
reference, especially when many circuits
must change synchronously, since unlike
the PLEP function, the duration for the
change is an input parameter.
CUBIC trims are essential for superconducting circuits because they avoid
discontinuities in the rate of change, which
would generate voltage spikes.
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2 Overview of power converter control
26
Function Generation Library
SINE, COSINE, SQUARE and STEPS
COSINE has windowing enabled to provide a smooth start and end
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2 Overview of power converter control
27
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Regulation
•
•
•
Regulating current generally requires three nested loops: Current, Voltage, Firing.
None, some or all of the loops may be digital (the others are analogue).
Regulation may use feedback or feedforward.
Function
generator
Power
Iref
Current
loop
Vref
Voltage
loop
Fref
PWM
Firing
Switching
bridges
V
Filter
Bridge voltage
measurement
Filter current
measurement
V
Magnet voltage
measurement
Magnet current
measurement
I
DCCT
Magnets
2 Overview of power converter control
28
Questions
3.
If a fault condition is active:
a. Depending on the fault the converter can sometimes
continue to operate
b. The converter must stop but can be restarted
c. The converter must stop and cannot be restarted
4. Without the FGC3 the ACAPULCO power converter is:
a. A voltage source
b. A current source
c. None of the above
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29
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
3 History of the FGC project
30
1989 - LEP
Power
Converters

One controller per converter (~700 in total).

MIL1553 fieldbus.

6809 microprocessor, FLEX OS and Pascal.

Analogue current regulation.

Function Generator included: Current reference created using DAC.
82
3 History of the FGC project
31
1989 - LEP
Power
Converters










1999 - LHC
Magnet Test
Benches
FGC project started in 1997 by the same team that
produced the LEP controls.
First requirement was to control the converters in
the magnet test benches in SM18 in 1999.
Function Generator/Controller Version 1 (FGC1).
One controller per converter (40 in total).
WorldFIP fieldbus.
Four 6U boards.
M68HC16 µP + TMS320C32 DSP in C.
Digital current regulation.
Reused LEP control crates.
Retired in 2010.
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3 History of the FGC project
32
1989 - LEP
Power
Converters
1999 - LHC
Magnet Test
Benches
2008 - LHC
Power
Converters

For the LHC radiation tolerance measures were
required (EDAC).

An evolution of the FGC1 became the Function
Generator/Controller Version 2 (FGC2).

Industrial form factor (20TE x 6U x 160mm) with a
protective metal cassette.

2100 produced, 1800 installed
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3 History of the FGC project
33
1989 - LEP
Power
Converters
1999 - LHC
Magnet Test
Benches
2008 - LHC
Power
Converters
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2009 - CPS
MPS
Converter

First requirement for FGC control in the PS
complex: the upgrade of the PS MPS
regulation.

The FGC2 was adaptable to support
regulation of magnetic field by receiving
the B-train with an extension card.

New software class written to support
cycling with PPM properties.

Dedicated application – no support for
Working sets/Knobs.
3 History of the FGC project
34
1989 - LEP
Power
Converters
1999 - LHC
Magnet Test
Benches
2008 - LHC
Power
Converters
82
2009 - CPS
MPS
Converter

Control of POPS required a new digital link
to the VME controller from Converteam.

A new interface card was created.

The PS MPS software class was upgraded
to support the link with the POPS controls.

Support for publication added so software
can work with Working set/Knobs and
INCA, although it will probably continue to
be controlled with dedicated application.
2011 - CPS
POPS
Converter
3 History of the FGC project
35
1989 - LEP
Power
Converters
1999 - LHC
Magnet Test
Benches
2008 - LHC
Power
Converters
82
2009 - CPS
MPS
Converter

Function Generator/Controller Version 3 (FGC3).

Evolution of FGC2 – Smaller, Faster, Cheaper.

Not radiation tolerant.

700+ will be installed by the end of LS2.

WorldFIP or 100Mbps Ethernet.
2011 - CPS
POPS
Converter
2012 - PSB
ACAPULCO
Converters
3 History of the FGC project
36
Questions
5.
6.
The main feature lacking in the FGC1 that was added in
the FGC2 was:
a. Support for PPM operation
b. Error correction for the memory
c. Ethernet interface
Compared to the FGC2 the FGC3 is:
a. The same size
b. Smaller
c. Larger
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37
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
4 Features of the FGC3
38
82
What is inside an FGC3?
A mainboard with two daughter boards:
Analogue interface
Network interface
4 Features of the FGC3
39
WorldFIP
interface
82
Analogue interface for
Type 1 converters
Mainboard:
MCU, DSP, Memories, Logic, digital I/O
Ethernet
interface
Analogue interface for
Type 2 converters
4 Features of the FGC3
40
Why two types of analogue interface?
•
•
Type 1 converters need 3 (or 4) acquisition channels up to ~10 ksps to
allow continuous regulation of the current:
1.
Circuit current from DCCT A
2.
Circuit current from DCCT B
3.
Voltage across the load
4.
Converter output filter capacitor current,
if FGC3 regulates the voltage
Type 2 converters need two “slow” and two “fast” channels:
•
Fast (500 ksps):
1. Load current
2. Load voltage
•
Slow (10 ksps):
1. Charger current
2. Capacitor voltage
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4 Features of the FGC3
41
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Internal architecture of FGC3
Network
interface
RAM
RAM
MCU
DSP
Flash
RAM
Nonvolatile
RAM
FPGA
RAM
Analog I/O
ADCs
DACs
Digital I/O
Power
converter
4 Features of the FGC3
42
FGC3 Processing:
• Floating point microcontroller (RX610 @ 100 MHz)
•
Runs a tiny real-time operating system called NanOS @ 1 kHz
•
Manages communications with the network
•
Manages power converter state and diagnostics
•
2 MB internal Flash for programs and databases
•
128 KB fast internal RAM for variables
•
1 MB external static RAM for post mortem logging
•
512 KB external non-volatile RAM for function data
• Floating point DSP (TI C6727 @ 300 MHz)
•
No operating system
•
Interrupt driven at required rate (1 – 20 kHz)
•
Acquisition from analogue interface
•
Function generation
•
Current regulation
•
Voltage regulation if required
•
256 KB fast internal RAM for program and variables
•
64 MB external RAM for functions and logging
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4 Features of the FGC3
43
FGC3 Hardware summary:
• Everything is reprogrammable over the network
• Lots of memory and processing power
• Could work in the non-radiation areas in the LHC using WorldFIP
network
• Will use faster Ethernet network everywhere else
• Analogue interface can be chosen too adapt to the requirements
• Two versions so far, but more could be designed if needed
• Costs about 1000 SF (compared to 2500SF for the FGC2 in 2003)
82
4 Features of the FGC3
44
82
FGC3 context
•
For some small converters (e.g. ACAPULCO, MidiDiscap) the FGC3 will plug
directly into the converter:
This saves the cost of a dedicated crate, PSU and cabling.
PSU
For larger converters there will be a “RegFGC3 crate” containing the FGC3 and
the other control and interlock cards needed to safely manage the power
components:
FGC3
RegDSP
STATE
DIG
ANA
SCOPE
•
Cables to power part
4 Features of the FGC3
45
Questions
7.
8.
The FGC3 design supports two type of analogue
interface:
a. One works with the WorldFIP network and the
other with Ethernet
b. One has 3 acquisition channels and the other has 4
c. One has 2 fast channels and two slow channels and
the other has 4 channels of the same speed
The non-volatile RAM memory in the FGC3 is:
a. Linked to the MCU
b. Linked to the FPGA
c. Linked to the DSP
d. There is no non-volatile RAM memory in an FGC3
82
46
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
5 FGC system architecture
47
82
FGC2 Architecture in the LHC
Sequencer
EquipState
Logging
Expert
applications
LSA
FGC
web site
Alarm server
Post mortem
server
Configuration
database
FGC status
server
FGC configuration
manager
Timing system
FGC gateway
x 73
WorldFIP fieldbus
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
FGC2 +
P.Conv
x 30
5 FGC system architecture
48
82
FGC3 Architecture in the PSB
Working Sets/Knobs
OASIS
Expert
applications
INCA
FGC
web site
Alarm server
Post mortem
server
Configuration
database
FGC status
server
FGC configuration
manager
Timing system
FGC gateway
x5
FGC_Ether
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
FGC3 +
P.Conv
x 64
5 FGC system architecture
49
What is FGC_Ether?
FGC_Ether = 100 Mbps Ethernet + 50 Hz sync
• Why Ethernet and why the 50 Hz sync?
• 2.5 Mbps WorldFIP has a limited throughput – adequate
for the slow cycles of the LHC but inadequate for the
fast cycling PS complex machines.
• 100 Mbps Ethernet provides the increased bandwidth.
• In order to have a guaranteed synchronisation signal the FGC needs a
50 Hz pulse from the timing receiver in the gateway.
• Does that mean a separate cable and connector in the FGC3?
82
5 FGC system architecture
50
82
What is FGC_Ether?
FGC_Ether = 100 Mbps Ethernet + 50 Hz sync
• No! Copper Ethernet cable has 4 pairs but only
2 pairs are used for 100Mbps.
• An unused pair can send the 50 Hz sync pulse if we
make a pulse injector to go between the Ethernet
switch and the FGC3.
• In this way, only the backbone needs separate Ethernet and sync cables.
The pulse injector
costs 240SF
(10SF/port) which
is cheaper than a
separate sync cable
Machine timing
Gigabit Ethernet
FGC
Gateway
One switch and one pulse
injector are needed per
24 FGC3s
CTRI
TechNet
50 Hz sync
Gigabit Ethernet
Ethernet Switch
Ethernet Switch
50 Hz sync
Pulse injector
FGC3
FGC3
FGC3
FGC3
1
2
3
4
...
Pulse injector
FGC3
FGC3
FGC3
FGC3
61
62
63
64
100 Mbps Ethernet
and
50 Hz sync share
the same cable
5 FGC system architecture
51
82
FGC_Ether Architecture
Accelerator
Controls
TechNet (Ethernet)
FGC_Ether Gateway
The network topology is a
bus of stars serving
clusters of FGCs
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
5 FGC system architecture
52
82
FGC_Ether Architecture
FGC_Ether Gateway
FGC
FGC
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
FGC
FGC
FGC
FGC
FGC
FGC
Or it can be a star of stars
if that suits the layout of
FGCs better!
Ethernet Switch
Pulse Injector
FGC
FGC
FGC
TechNet (Ethernet)
FGC
Ethernet Switch
Pulse Injector
Accelerator
Controls
5 FGC system architecture
53
82
FGC_Ether Architecture
Ethernet Switch
Pulse Injector
Accelerator
Controls
TechNet (Ethernet)
Max length: 100m
FGC
FGC
FGC
FGC
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
FGC
FGC
FGC
FGC
FGC
FGC
Ethernet Switch
Pulse Injector
FGC
FGC
FGC_Ether Gateway
5 FGC system architecture
54
FGC_Ether hardware
← All the PSB FGC_Ether gateways are
in the same rack for ease of access.
→ The FGC3’s include the FGC_Ether
network interface.
↓ Every Ethernet switch is paired with
an FGC_Ether pulse injector
82
5 FGC system architecture
55
82
FGC network protocol over Ethernet
• The FGC protocols that run on top of WorldFIP were ported to run on
raw Ethernet packets.
• Same cycle period (20 ms) but Ethernet provides a larger maximum
packet size.
• Multiple packets can be sent in the same cycle.
• No contention for bandwidth
• FGC software can support either network interface.
Quantity
WorldFIP
FGC_Ether
120 bytes
1500 bytes
Max data rate for set commands
3 KB/s
75 KB/s
Max data rate for get commands
3-6 KB/s
shared between get and
publication
> 200 KB/s
3 KB/s
50 KB/s
Max packet size
Max data for publication
Software updates
> 200 KB/s
5 FGC system architecture
56
82
Addressing on FGC_Ether
• The network address for WorldFIP is encoded with a small circuit board
in the WorldFIP connector.
• This works very well in the LHC and we wanted to find a similar solution
that also allows:
•
One FGC+Converter to power different circuits via the patch panel
•
Different FGC+Converters to power the same circuit at different times:
i.e. a spare converter takes over if there is a fault in the primary converter
• These cases require that the address be moveable and therefore an
address dongle was created:
5 FGC system architecture
57
82
Addressing on FGC_Ether
• Every circuit is given a name and a corresponding device is created in the
controls database.
• Every device is assigned to an FGC_Ether gateway and is given a MAC
address (1-64) which is assembled into a dongle with a tag giving the
name of the circuit.
• So every circuit/device is defined but only those plugged onto a
powered-up FGC will be online and available.
• Use cases:
•
If a converter fails and a spare must take over then the piquet has simply to move the
address dongle to the FGC in the new converter and it will take over with identical
behaviour. No changes are required to any software or databases.
•
If the circuit connected to an ACAPULCO converter in the PSB is changed then the
piquet will remove the dongle associated with the old circuit from the FGC and put it
into storage, and he will plug on the dongle for the new circuit and it will become
available.
5 FGC system architecture
58
82
Architecture layers for applications accessing an FGC
Working Sets/Knobs
TechNet
INCA
JAPC
CMW
TechNet
CMW
TIMING
FGC gateway
FGC_Ether fieldbus
FGC
5 FGC system architecture
59
82
FGC Platforms, Devices, Classes and Properties
FGC Platform
FGC Device
A computer that supports one or more FGC
classes. This can be an FGC gateway (FEC) or
an FGC2 or FGC3.
An instance of an FGC class running on a
platform. Supports Get/Set and Subscribe to
properties and publishes data at 50Hz.
•
•
•
•
CFC-361-RPSBB
FGC gateway in PSB
RPHK.USA15.RXTOR.ATLAS Atlas toroid FGC2
RPOPS.367.RP.MPC
POPS FGC2
RPCAB.361.BR2.DHZ3L4 PSB ACAPULCO FGC3
FGC Properties
FGC Class
A computer that supports an FGC class. This
can be an FGC gateway (FEC) or an FGC2 or
FGC3.
A program that runs on a specific FGC
platform. It instantiates a particular set of
properties, alarms and published data.
•
•
•
•
REF.FUNC.TYPE
STATE.PC
STATUS.FAULTS
TEMP.FGC.IN
Ref generator function type
Power converter state
Latched faults
FGC inlet air temperature
•
•
•
•
FGCD_GW_ETHER
FGC_Ether gateway
FGC2_PC
FGC2 power converter class
FGC2_POPS
FGC2 POPS class
FGC3_PC
FGC3 power converter class
5 FGC system architecture
60
Questions
9.
With an FGC_Ether network the FGC protocol is
carried inside:
a. UDP packets
b. TCP packets
c. Raw Ethernet packets
10. An FGC software class can:
a. Run on only one type of FGC platform
b. Run on one more types of FGC platform
c. Run on any type of FGC platform
82
61
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
6 Working Sets/Knobs and function editor via INCA
62
• As for the existing PSB converters the main operator interface will be
based on Working Sets/Knobs and the function editor.
• These pass via INCA which takes care of managing settings in the
database.
• With the existing converters a single
acquisition is taken at a given time
during the cycle.
• This is monitored by the existing
Working Sets interface.
• With the FGC3, the current regulation
is in the software so the regulation
error is monitored continuously by the
software.
• Fault and warning limits are checked
continuously.
• The maximum absolute regulation
error is captured every cycle and is
available in a property.
82
6 Working Sets/Knobs and function editor via INCA
63
• This maximum absolute regulation
error will be included on the working
sets interface along with the converter
state.
• It provides a quality factor for the
regulation for each individual cycle.
• This is better than the existing check
which applies to one moment in the
cycle only.
• Development will continue in February
to be ready for beam in March.
82
64
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
7 OASIS
65
82
OASIS Integration
• OASIS works now with digitiser of various types, connected to triggers.
• A new software interface called a DataSource has been defined which
will allow systems like the FGC3s to supply acquisition data to be
displayed along with other signals using the OASIS Viewer.
• Initially the FGC3 will supply I_REF and I_MEAS signals. They are
acquired at 10 kHz but a lower rate will be provided to OASIS to keep the
number of samples to a reasonable level.
• The choice of signals, sampling rate and signal navigation will be
discussed with the PSB operators in February to define the specification.
66
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
8 Alarms
67
• All FGC devices (includes gateways and FGCs) have a STATUS property:
•
STATUS.FAULTS
•
STATUS.WARNING
•
STATUS.ST_LATCHED
•
STATUS.ST_UNLATCHED
• Each field is a 16-bit bit mask.
• Faults are mapped to level 3
alarms (red)
• Warnings are mapped to level2
alarms (yellow)
• ST_LATCHED flags are not linked to alarms but provide additional
information about some of the faults. For example:
•
FGC_HW faults could have various causes indicated by the latched status in
ST_LATCHED:
•
DAC_FLT – DAC calibration failed
•
MEM_FLT – Memory fault detected
•
ANA_FLT – Analogue interface fault detected
•
DSP_FLT – DSP fault detected
82
8 Alarms
68
82
• The FGC gateway is responsible for sending FGC alarms to the alarm
server.
• If an FGC goes offline then a special alarm is activated to report that the
FGC is not available.
• If the gateway goes offline then after about 10 minutes LASER produces
an alarm.
69
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
9 Post Mortem
70
82
Post Mortem (PM) Logging
• PM logging was mandatory for all LHC equipment, with two objectives:
•
Diagnose the fault in a piece of equipment that has tripped – analysis of one log.
•
Diagnose the cause of a beam loss – analysis of logs from all systems.
• Different tools are used for these two cases.
• In the PS complex there is no equivalent to an LHC beam dump so only
the first case is relevant.
• Analysis of individual PM logs from FGCs (and many other systems) uses
the Labview PM_Browser interface:
9 Post Mortem
71
82
Post Mortem (PM) Logging
• The PM Browser can show acquisition data in charts and can perform
various analysis functions (FFT, derivative, etc…)
• Event log data can be shown as a table.
9 Post Mortem
72
82
Post Mortem (PM) Logging
• The FGC2s running the PS MPS and POPS have introduced PM logging to
the PS complex.
• The FGC3s in the PSB will make it available to the EPC piquet and
converter experts to help rapidly diagnose causes of ACAPULCO
converter trips.
• Operators are also welcome to use it too! It can be useful to paste a
screen shot into the log book to help the expert know the device and
time stamp of the PM log that they need to investigate.
• PM logs are stored indefinitely!
73
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
10 Expert interfaces
74
FGC status web pages – updated at 5 Hz – http://cern.ch/fgc
82
10 Expert interfaces
75
82
FGCrun+
Analysis
1Hz Status
Responses
FGC
Event
Log
FGC
Terminal
Help
10 Expert interfaces
76
FGCspy – Graphical interface developed for the LHC
FGCspy supports PPM in a limited way for the PS MPS and POPS
classes but it is not well suited to cycling machines.
82
10 Expert interfaces
77
82
LabVIEW Dataviewer (LVDV)
Graphical interface developed for the PS complex
In development by EN-ICE, designed to fully support PPM operation with many
improvements and new features. LVDV will replace FGCspy in 2012.
Load
file
window
Clone
Clone
Primary
window
windows
chart
window
st derivative
11stPrimary
derivative
windows
windows
chart
window
nd derivative
22nd derivative
windows
windows
Signal
selection
and
analysis
window
Visible signals
Time range
Primary
chart
window
Fitwindows
windows
Fit
Save
file
window
FFT
FFT
windows
windows
Timeconstant
constant
Time
windows
windows
78
Contents
1.
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Corrector dipole and multipole power converter
renovation in the PSB
2.
Overview of power converter control
3.
History of the FGC project
4.
Features of the FGC3
5.
FGC system architecture
6.
Working Sets/Knobs and function editor via INCA
7.
OASIS
8.
Alarms
9.
Post Mortem
10. Expert interfaces
11. Use of FGC3 for other converters in the future
82
11 Use of FGC3 for other converters in the future
79
82
The FGC3 will be used for new and renovated Type 1 converters
in various locations in the years ahead (dates are not definitive
at the moment):
• SPS North area converters
• TT2
• PS correctors
• SPS Mains
• Booster stripping foil dipoles
• Booster 2 GeV upgrade
11 Use of FGC3 for other converters in the future
80
• The majority of converters in the Linac4, PSB and PS transfer lines are
Type 2 (capacitor discharge) converters.
• The next converter to be supported by the
FGC3 will be the Mididiscap: ±600V ±20A
• The FGC3 will run the FGC3_FP_PC software class and will use the
ANA-102 high-speed acquisition interface to measure the magnet
current and voltage during the pulse at 500 ksps for up to 4 ms.
82
11 Use of FGC3 for other converters in the future
81
• Other families of capacitor discharge converters will follow for Linac4:
Megadiscap, klystron modulator.
• All will use the same FGC3_FP_PC software class – this will be the
subject of a future operator training!
82
82
Contents
CONTENTS
CERN Operator Training
FGC3 for power converter controls in the PSB
Thank you for your attention!
Any questions?
Contacts:
ACAPULCO converters: Serge Pittet
FGC Gateways: Stephen Page
FGCs: Quentin King or Pierre Dejoué
Answers:
1.b 2.a 3.c 4.a 5.b 6.b 7.c 8.a 9.c 10.a
82
5 FGC system architecture
83
Extra Questions
9.
What year did the FGC2 start controlling the PS MPS?
10. What is the frequency of the FGC_Ether sync pulses?
11. What is the voltage and current rating of the
ACAPULCO converter?
82