Transcript ELG6163_Burton

Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Multiprocessors for DSP
SYSC5603 Digital Signal Processing
Microprocessors, Software and
Applications
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Outline
 Why Multiprocessor Systems?
 Chip Multiprocessor (CMP) Architectures
 CMP Advantages & Disadvantages
 Current CMP Solutions
 Tools for Designing and Simulation CMPs
 Summary
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Why Multiprocessor Systems?
 Single-core microprocessor performance increases are
beginning to slow [1] due to:
 Increasing power consumption (>100 W)
 Increasing heat dissipation
 Diminishing performance gains from ILP & TLP [2]
 As a result manufactures are turning to a multi-core
microprocessor approach
 Multiple smaller energy efficient processing cores are
integrated onto a single chip
 Improves overall performance by performing more work
concurrently
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
CMP Architectures
 Two general types of multi-core or chip multiprocessor
(CMP) architectures
 Homogeneous CMPs – all processing elements (PEs) are the
same
 Heterogeneous CMPs – comprised of different PEs
 Homogenous dual-core processors for PCs are now
available from all major manufactures
 Heterogeneous CMPs are available in the form of
multiprocessor systems-on-chips (MPSoCs)
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Homogenous CMP - Quad-SHARC DSP
Quad-SHARC Functional Diagram
Core ADSP-21060 SHARC Functional Diagram
[3]
[3]
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Heterogeneous CMP – Cell BE
Cell Broadband Engine Block Diagram
[4]
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
CMP Advantages
 CMPs have several advantages over single processor
solutions
 Energy and silicon area efficiency
• By Incorporating smaller less complex cores onto a single
chip
• Dynamically switching between cores and powering down
unused cores [5]
 Increased throughput performance by exploiting parallelism
• Multiple computing resources can take better advantage of
instruction, thread, and process level parallelism
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
CMP Disadvantages
 Poorer performance in single task situations
 Need to have software that can be decomposed into multiple
threads in order to take full advantage of CMP resources
 Programming CMPs is inherently more difficult due to:
 Software needing to be designed with multiple threads
 Parallel programming and its associated issues such as shared
memory access and message passing
 Large number of possibly different types of PEs
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Current CMP Solutions
 Many different types of CMP solutions exist today and
choosing one depends on the intended application
 In the desktop computing industry all major manufactures now
offer multi-core solutions
 Manufactures of PDSPs also offer multi-core versions of their
products
 FPGA manufactures offer programmable devices with
immersed microprocessor cores
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Design and Simulation Tools
 Of the multi-core solutions that exist none offer support
for a multi-core design from scratch
 Instead customers decide on a multi-core platform from a
specific vendor and generally use the tools available from that
vendor to program, test, and verify their multi-core solution
 One solution for the design and simulation of multiprocessor systems from the ground up is offered by
Cmpware Inc.
 They offer a configurable multi-processor development kit
(CMP-DK) which allows for the design, programming, and
testing of multi-processor systems
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Design and Simulation Tools – The
CMP-DK
 Their development environment lets processors and
their interconnection network be quickly and simply
defined [6]
 Existing processor cores along with their associated tools,
libraries, and software can be used [6]
 Also, users are able to specify their own custom processor
architectures and interconnect networks or modify an existing
architecture as needed.
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
Summary
 The CMP architecture is now the architecture of choice
for semiconductor manufactures
 CMPs are more area and energy efficient than single
processor solutions
 CMPs achieve greater throughput than single processor
solutions as more work can be done concurrently
 Custom multi-processor systems can now be designed
and simulated from the ground up using software
solutions from several companies
Trevor Burton
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
References
[1]
[2]
[3]
[4]
Trevor Burton
D. Geer, “Chip makers turn to multicore processors,”
IEEE Computer, vol. 38, no. 5, pp. 11-13, 2005.
L. Hammond, B. Hubbert, M. Siu, M. Prabhu, M.
Chen and K. Olukotun, “The Stanford Hydra CMP”,
IEEE Micro, vol. 20, no. 2, pp. 71-84, Mar./Apr. 2000.
AD14060 Data Sheets. (2004). Analog Devices.
Norwood, MA. [Online]. Available:
http://www.analog.com/UploadedFiles/Data_Sheets/
4003696AD14060_L_b.pdf
Cell Broadband Engine Architecture and its first
implementation. [Online]. Available: http://www128.ibm.com/developerworks/power/library/pacellperf/#23ref1
4/6/2016
Department of Systems and Computer Engineering
Digital Signal Processing Laboratory
References
[5]
[6]
Trevor Burton
R. Kumar, D. M. Tullsen, N.P. Jouppi, and P.
Ranganathan, “Heterogeneous Chip
Multiprocessors,” IEEE Computer, vol. 38, no. 11,
pp. 32-38, 2005.
S. A. Guccione. (2005, April). Programming
Configurable Multiprocessors. Presented at the 12th
Reconfigurable Architectures Workshop. [Online].
Available:
http://www.cmpware.com/Papers/RAW2005/Cmpwar
e_RAW_2005.pdf
4/6/2016