January 29, 2013

Download Report

Transcript January 29, 2013

Innovative Virtual Prototype
Technologies for System and
Application Bringup
Guy Moshe
General Manager
Design Creation BU/ESD
January 29, 2013
1
Market Trends
Embedded systems are scaling rapidly:
– Complex multi-core architectures (e.g. ARM
big.LITTLE)
– Large software stacks
Embedded Software in critical path
– Applications everywhere
– User experience
– Differentiates products: Mobile, Automotive,
Networking….
– Higher cost and investment
Opportunity: Companies are setting software
infrastructure to drive future design and
verification activities
January 29, 2013
2
What’s Changed in System Design?
Software is fastest growing component of SoC development cost
120
Impact of Design Technology on SOC
Consumer Portable Implementation Cost
Hardware Costs
100
Software Costs
$ US Millions
80
60
40
20
0
2009
2010
2011f
2012f
All this software requires a lot of analysis!
January 29, 2013
3
HW/SW Development Evolution
System / SOC
• CPU(s)
• Coprocessors
• Graphics
• Audio
• Network(s)
• GPIOs
• Custom IP
HW & SW Junction
Pain Here!
HW
SW
Linux / RTOS
• Boot code
• Security layers
• System Config
• Drivers
• ISRs
• Application Code
Device
Hardware Software interaction presents
a significant system analysis challenge
January 29, 2013
4
Embedded System Traditional Flow
“Host” Machine
SW Developer Tools
IDE & Builder
Compiler
Debugger
Profiler
Embedded SW Device
UI™
Application Stacks
Middleware, Agents
Probe
Android™ Linux® Others®
Sequential delivery lifecycle (Late HW)
Limited visibility & trace capacities
Measurement affects behavior - Heisenberg Effect….
Rigid Setup
January 29, 2013
5
Executing on a Virtual Target
Virtual “Target” Device
“Host” Machine
LCD
Video
CodeBench Virtual Edition
IDE & Builder
Compiler
Debugger
Profiler
MPEG
GPU
CPU
Embedded SW Device
UI™
Application
Stacks
USB
ETHERNET
DMA
Bridge
PCI
EXPRESS
SDRAM
Middleware, Agents
Peripherals
Android™ Linux® Others®
UART
GPIO
GDB
Timer
PHY
PHY
PHY
DDR3
A Virtual Prototype is a high-level simulation model of the target hardware
Can execute unmodified software images (drivers, firmware, OS, applications)
Run at close to real time speed
Run with standard Toolchain’s and software IDE’s
January 29, 2013
6
Introducing Virtual Prototyping
High-level simulation model of the
SoC/System HW
– Instruction set simulator executes code at close
to real-time speed
Virtual Prototype
LCD
Video
MPEG
GPU
CPU
– Peripherals simulated with behavioral models
DMA
Bridge
– Host resources provide
real world I/O
USB
ETHERNET
PCI e
SDRAM
Peripherals
UART
Key values
GPIO
Timer
PHY
PHY
PHY
DDR3
– Early availability of a hardware accurate model
– Fast, deterministic execution of native embedded
software
– Full visibility & control
– Software debug connection
– May have various timing fidelities
January 29, 2013
7
Virtual Prototyping vs. HW Prototypes
Provides capabilities similar to HW prototype
– Simulation speed close to Real Time (~100s of
MIPS)
– Configuration, Management & Manipulations
– Debugging, Analysis & Profiling
Developer Tools
IDE & Builder
Compiler
Debugger
Profiler
But provides superior capabilities on Virtual
Prototype
VP Plug-in
– Better simulation control
– Better visibility & tracing
– Better Analysis
Reference Design Board
Operating System
LCD
Video
MPEG
Simulation Control
Load & Restart
Start/stop
SW
Control
GPU
Registers, Memory, IO’s
CPU internals
Cache logging
CPU
Trace
Bridge
DMA
USB
ETHERNET
PCI
EXPRESS
SDRAM
UART
GPIO
Functional vs. Performance mode
Application-level Power/Performance
Analysis
Analysis
Peripherals
Timer
PHY
Virtual Prototype
PHY
PHY
DDR3
VP Plug-in
SW IDE
January 29, 2013
8
Virtual Prototype Creation
•
Delivers a target HW model executable to the software team
–
–
–
Integrate final application software with actual hardware architecture
Validate and debug software against early HW model before RTL
Tune software to meet performance and power requirements
Linux/Windows
Cross Compile
CPU
Subsystem
JPEG
MPEG
LCD
Master
Slave
Master
Master
End User
Application
Software
AMBA AXI
Master
Memory
DMA
Virtual Prototype wizard dialog for
Virtual Prototype creation
Developer Tools
Slave
Bridge
Ethernet
AMBA APB
Slave
Slave
UART
GPIO
PHY
Virtual
Prototype
Executable
Terminal
January 29, 2013
9
Deterministic System Execution
Embedded SW Device
Consistent hardware and software
behavior
Well defined system Timing
–
UI™
Application Stacks
Middleware, Agents
Instantly stop all system clocks
Android™ Linux® Others®
Non-intrusive Visibility & Profiling*
Interrupt Controller
Timers
– No affect on behavior
– Minor affect on performance
CPU 0
ICache
Interrupt Controller
Timers
CPU 1
DCache
ICache
CPU 0
DCache
CPU 1
ICache
DCache
L2 cache + SCU
* Board tracing and debug is usually intrusive,
affecting speed, performance measurements and
behavior
Bridge
UART
GPIO
DCache
L2 cache + SCU
USB
Peripherals
ICache
ETHERNET
SDRAM
GPU
Timer
PHY
January 29, 2013
PHY
DDR3
10
Debugger Connection to virtual target
GDB Connection
to CPU (Baremetal debug)
“Host” Machine
CodeBench Virtual Edition
IDE & Builder
Compiler
Debugger
Profiler
LCD
Video
MPEG
DMA
Bridge
GPU
USB
CPU
ETHERNET
PCI
EXPRESS
SDRAM
Peripherals
UART
GPIO
Timer
PHY
PHY
PHY
DDR3
Ethernet Connection to OS (Linux Mode)
The debugger can connect to the virtual target in Linux or Baremetal
mode without any Probe. Debugging link is set instantly.
January 29, 2013
11
Network & I/O Connectivity
Virtual Platform
“Host” Machine
AUX
LCD
MPEG GPU
Video
Analog
SW Developer Tools
Standby/ Mute
CPU
I2C Ampli
CDSP
AM/FM
Front End
I2C
I2C DSP
IDE & Builder
I2C
FM
Front End
Reset
Flash
DRAM
MNAND
16GB
Audio data I2S
Compiler
Debugger
Embedded SW Device
I2C
TMC
Front End
DATA
Radio Processor
DRA404HS
DAB
DECODER
GDB
UI™
PCI
Bridge DMA
USB
ETHERNET
SDRAM
Application Stacks
EXPRESS
BT I2S
SPI
DAB
Front End
I2S
To USB HUB
IPOD chip
UART
Control
I2C TU2
Profiler
ENx Pins
I2C Ampli
I2C DSP
SPI
Standby
Middleware, Agents
Reset CDSP
Control
Peripherals
CAN
TJA1054
Tx/Rx
®
®
Android™ Linux Others
Vehicle processor
VµC
V850
EEPROM
I2C Eeprom
UART GPIO
Terminal
The Virtual Platform can
connect through the host
physical I/O’s
Timer
PHY
PHY
Phy
DDR3
USB Connect
Driver
Ethernet Connect
Driver
• Eth, USB, LCD, keyboard
File I/O (gps, gyro)
Virtual Drivers
• IP Address
• Ping from terminal…
January 29, 2013
12
Instantly Configure Hardware
LCD
Video
MPEG
Run regressions on
multiple alternatives
GPU
CPU
LCD
Video
MPEG
DMA
Bridge
Configure Cache,
MMU, # of cores
GPU
USB
CPU
PCI
EXPRESS
ETHERNET
SDRAM
Peripherals
LCD
Video
UART
GPIO
MPEG
DMA
Bridge
USB
PHY
PHY
GPIO
PCI
EXPRESS
ETHERNET
PHY
DDR3
Peripherals
UART
CPU
SDRAM
LCD
Video
Timer
DMA
Bridge
Configure Memory
Configure
Memory
& Controller
& Controller
GPU
Timer
PHY
USB
ETHERNET
PHY
PHY
MPEG
PCI
EXPRESS
SDRAM
PHY
DDR3
GPU
CPU
DDR3
Peripherals
UART
GPIO
Timer
PHY
PHY
DMA
Bridge
USB
ETHERNET
PCI
EXPRESS
SDRAM
Peripherals
UART
GPIO
Timer
PHY
PHY
PHY
DDR3
You can easily manipulate and configure the
hardware
Test platform derivatives and run trade off analysis
January 29, 2013
“Disable” selected
“Disable”
selected
IP’s
IP’s
Manipulate
Manipulate
Connectivity
Connectivity
Manipulate clocks
clocks
Manipulate
13
Tightly Coupled Debug
Break software execution
on events in the
hardware model
January 29, 2013
14
Deep non-intrusive visibility to hardware
LCD
Video
MPEG
DMA
Bridge
GPU
Trace Cache &
MMU sequences
CPU
USB
ETHERNET
PCI
EXPRESS
SDRAM
PHY
PHY
PHY
DDR3
Trace All internal
and I/O registers
Peripherals
UART
GPIO
Timer
When execution on a Virtual Target the user get deep and
constant access at all times to all hardware internals. All
tracing are collected on the host.
This visibility is critical to unveil deep embedded bugs during
OS bringup, running graphic application, etc.
January 29, 2013
Trace All data
transfers
Trace All Memories
15
Non-intrusive SW trace & profiling
With a Virtual target, Software is executed on
host using JIT (Just In Time) translation. This
mechanism provide backdoor access to software
without affecting target execution
Host Machine
Software Source
• Can inject test code, e.g. prints, callbacks
A
B
C
Trace Point
D
• Controlled via scripts in real time
Hardware state dependencies
• No recompilation is required
Software Image
A
B
TCL Scripts
C
D
X
Executed
on Host
All tracing collected on Host
A
Target ISS
Host Code
Execution
(JIT)
B
Code
Injection
X
C
D
• Unlimited capacities
• No affect on target performance
Virtual Platform
Target Functionality & Timing not affected
• Software image untouched
Print
Log
Assert
Can be used to various validation flows
• Code Coverage
• Software Profiling
• Fault Injection
January 29, 2013
16
Fault Injection during software debug
Virtual Platforms can be manipulated to inject artificial faults,
internal or from external devices at runtime
Injecting Software Faults
Register security & safety failures
AUX
LCD
Video
Analog
MPEG
CPU
GPU
Register values
Standby/ Mute
I2C Ampli
CDSP
Protocol errors
I2C
AM/FM
Front End
I
2
C
I2C
D
S
P
FM
Front End
Flash
Reset
M
N
A
N
D
1
6
G
B
Audio data I2S
TMC
Front End
Tracking failure statistics over multiple lifecycles
DRAM
I2C
DATA
Radio Processor
DRA404HS
DAB DECODER
BT I2S
SPI
DAB
Front End
I2S
To USB HUB
IPOD chip
Bridge
UART
Control
DMA
USB
ETHERNET
PCI
SDRAM
EXPRESS
I2C TU2
I2C Ampli
Injecting Hardware Faults
ENx Pins
I
2
C
SPI
Standby
D
S
Reset
P CDSP
Control
Peripherals
CAN
TJA1054
Tx/Rx
Interrupts
Vehicle processor
VµC
V850
I2C Eeprom
EEPROM
UART
GPIO
Memory Failures
Timer
PHY
PHY
Phy
DDR3
Power Failures
File system and disk failures
External device failures
January 29, 2013
17
Profile Hardware / Software in synch
Trace hardware and software simultaneously
Hardware cache, power
Software functions
Processor access latency
Explore DVFS and user experience senarious
SW Functions (Start - End) Gant-Chart
CPU States (active / sleep / Idle..)
Power Consumption
January 29, 2013
18
SW – Cache – Power Interaction
Track SW calls
Correlate SW to
– Stack trace
– Cache activity
– Power consumption
Cache Hit Rate
Power Consumption
Identify functions for
optimization
– Cache hit percentage decreases
– Power consumption increases
January 29, 2013
19
Software Profiling & Analysis
AUX
LCD
MPEGGPU
Video
Analog
Standby/ Mute
CPU
I2C Ampli
CDSP
AM/FM
Front End
I2C
I2C DSP
I2C
FM
Front End
Reset
Flash
DRAM
MNAND
16GB
Audio data I2S
GDB
Embedded SW Device
I2C
TMC
Front End
DATA
Radio Processor
DRA404HS
DAB
DECODER
UI™
BT I2S
SPI
DAB
Front End
I2S
To USB HUB
IPOD chip
UART
Control
I2C TU2
I2C Ampli
PCI
BridgeDMA USB ETHERNET
SDRAM
Application Stacks
EXPRESS
ENx Pins
I2C DSP
SPI
Standby
Reset CDSP
Control
Middleware, Agents
Peripherals
CAN
TJA1054
Tx/Rx
®
®
Android™ Linux Others
Vehicle processor
VµC
V850
EEPROM
I2C Eeprom
UART GPIO Timer
PHY
CPU Scheduling
PHY
Phy
DDR3
Function Call Hierarchy
E.g. Graphic Analysis •
– OpenGL and Qt Tracing
– Smart Agents pinpoint miss
behavior
OGLES Rendering
CPU Utilization
– Visibility into graphic execution
layers
January 29, 2013
20
Example - Integrate with Automotive Network Simulation
AUTOSAR
SWC
AUTOSAR
SWC
RTE
AUTOSAR
SWC
AUTOSAR
Matlab
Simulink
RTE
HIL
BSW
OS
BSW
OS
Virtual ISS/ECU
Virtual ISS/ECU
Bus
Easy configuration & manipulation (derivative) •
Network & Absent Node Simulation •
Timing, Performance & Utilization in Network context •
SW Profiling in Network Context •
Safety in Network context •
January 29, 2013
21
Summary: Virtual Prototype Key Values
While executing software on a Virtual Target is similar to
executing on a physical board, it offers several key
capabilities that are unique
–
–
–
–
–
–
–
–
–
Availability before silicon or hardware are committed
Instantly configure and manipulate hardware alternatives, derivatives
and subsets
Deep non-intrusive visibility to HW and SW
“Unlimited” tracing capacities with no affect on behavior
Tightly control hardware software execution
Fast, deterministic execution of native embedded software
May have various abstraction levels and timing fidelities
Host resources provide real world I/O
Its Virtual! You can share it through emails
January 29, 2013
22
Thank You!
January 29, 2013
23
Non-intrusive visibility & debug
Virtual Platform
“Host” Machine
AUX
LCD
MPEG GPU
Video
Analog
Standby/ Mute
CPU
I2C Ampli
CDSP
AM/FM
Front End
SW Developer Tools
I2C
I2C DSP
I2C
FM
Front End
Reset
Flash
DRAM
MNAND
16GB
Audio data I2S
IDE & Builder
Embedded SW Device
I2C
TMC
Front End
DATA
Radio Processor
DRA404HS
DAB
DECODER
BT I2S
SPI
DAB
Front End
Compiler
Debugger
I2S
To USB HUB
IPOD chip
UART
Control
GDB
I2C TU2
I2C Ampli
UI™
PCI
Bridge DMA
USB
ETHERNET
SDRAM
Application Stacks
EXPRESS
ENx Pins
I2C DSP
SPI
Standby
Middleware, Agents
Reset CDSP
Control
Peripherals
Profiler
CAN
TJA1054
Tx/Rx
®
®
Android™ Linux Others
Vehicle processor
VµC
V850
EEPROM
I2C Eeprom
UART GPIO
Timer
PHY
Backdoor access to software execution
•
Trace points at any Software location
•
Inject piece of code at Trace point during execution
•
Control and manipulate software execution
Memory Allocation
PHY
Phy
DDR3
Hardware Trace
Hardware Tracing
•
Registers, CPU State & IRQ visibility, MMU & Caching
sequences
•
Pipeline & Buffering
•
Throughput & Latencies
January 29, 2013
SW Code Coverage
24