Transcript Packet Switching

Outline
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Packet switching paradigms
Bridges and extended LANs
Cell switching
Switching hardware
Cell Switching (ATM)
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Connection-oriented packet-switched network
Used in both WAN and LAN settings
Signaling (connection setup) Protocol: Q.2931
Specified by ATM forum (www.atmforum.com)
Packets are called cells
– 5-byte header + 48-byte payload
• Commonly transmitted over SONET
(Synchronous Optical NETwork)
– other physical layers possible: Wireless
Variable vs Fixed-Length Packets
• No Optimal Length
– if small: high header-to-data overhead
– if large: low utilization for small messages
• Fixed-Length Easier to Switch in Hardware
– simpler
– enables parallelism
Big vs Small Packets
• Small Improves Queue behavior
– finer-grained pre-emption point for scheduling link
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maximum packet = 4KB
link speed = 100Mbps
transmission time = 4096 x 8/100 = 327.68us
high priority packet may sit in the queue 327.68us
in contrast, 53 x 8/100 = 4.24us for ATM
– near cut-through behavior
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two 4KB packets arrive at same time
link idle for 327.68us while both arrive
at end of 327.68us, still have 8KB to transmit
in contrast, can transmit first cell after 4.24us
at end of 327.68us, just over 4KB left in queue
Big vs Small (cont)
• Small Improves Latency (for voice)
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voice digitally encoded at 64Kbps (8-bit samples at 8KHz)
need full cell’s worth of samples before sending cell
example: 1000-byte cells implies 125ms per cell (too long)
smaller latency implies no need for echo cancellers
• ATM Compromise: 48 bytes = (32+64)/2
Cell Format
• User-Network Interface (UNI)
4
8
16
3
1
8
384 (48 bytes)
GFC
VPI
VCI
Type
CLP
HEC (CRC-8)
Payload
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host-to-switch format
GFC: Generic Flow Control (still being defined)
VCI: Virtual Circuit Identifier
VPI: Virtual Path Identifier
Type: management, congestion control, AAL5 (later)
CLPL Cell Loss Priority
HEC: Header Error Check (CRC-8)
• Network-Network Interface (NNI)
– switch-to-switch format
– GFC becomes part of VPI field
Virtual Circuit (VC) Switching
• Explicit connection setup (and tear-down) phase
• Subsequent packets follow same circuit (path)
• Sometimes called connection-oriented model
0 Switch 1
1
3
2
5
• Each switch
maintains a
VC table
3
11
2 Switch 2
1
0
Host A
7
1
0 Switch 3
3
4
2
Host B
Virtual Paths
• The identifier for virtual circuits is split into two
paths:
– VPI: 8-bit virtual path identifier
– VCI: 16-bit virtual circuit identifier
• Forms a two-level hierarchy
• Example: Two ATM LANs of a corporation
connected by a public ATM network
– The public ATM switches only look at the VPI
– The ATM switches in the LANs look at the entire 24-bit
identifier
Segmentation and Reassembly
• ATM Adaptation Layer (AAL)
– AAL 1 (CBR) and 2 (VBR) designed for applications that
need guaranteed rate (e.g., voice, video)
– AAL 3/4 designed for packet data
– AAL 5 is an alternative standard for packet data. Designed
by the computer industry. Most used interface to ATM.
AAL
AAL
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ATM
ATM
AAL 3/4
• Convergence Sublayer Protocol Data Unit (CS-PDU)
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8
8
16
CPI
Btag
BASize
< 64 KB
User data
0– 24
8
8
16
Pad
0
Etag
Len
CPI: common part indicator (version field: currently 0)
Btag/Etag:beginning and ending tag
BAsize: hint on amount of buffer space to allocate
Length: size of whole PDU
Cell Format
40
ATM header
2
4
10
Type
SEQ
MID
352 (44 bytes)
Payload
6
10
Length
CRC-10
– Type
• BOM: beginning of message
• COM: continuation of message
• EOM end of message
– SEQ: sequence of number
– MID: message id
– Length: number of bytes of PDU in this cell
AAL5
• CS-PDU Format
< 64 KB
0– 47 bytes
16
16
32
Data
Pad
Reserved
Len
CRC-32
– pad so trailer always falls at end of ATM cell
– Length: size of PDU (data only)
– CRC-32 (detects missing or misordered cells)
• Cell Format
– end-of-PDU bit in Type field of ATM header
ATM in the LAN
• ATM is generally used for backbones
• ATM can also be used for LAN but requires special
mechanisms to emulate LAN characteristics (e.g.,
broadcast used by ARP)
• Solutions:
– New protocols that do not require broadcast (e.g., ATMARP)
– Emulate shared media LAN: LAN Emulation (LANE)
LANE
• LANE servers:
– LAN Emulation Configuration Server (LECS): configuration
– LAN Emulation Server (LES): configuration
– Broadcast and Unknown Server (BUS): data transfer
• LAN Emulation Client (LEC):
– Is connected to the LECS through a predefined VC
– Gets config info from LECS (e.g., type of LAN, maximum
packet size, ATM address of the LES)
– LEC registers with LES (ATMADDR, MACADDR), and gets
the BUS ATMADDR
– Broadcast is sent to BUS
– Unicast: first packet sent to BUS + Address resolution request
to LES, subsequent packets are directly sent to the destination
over a newly established VC
Outline
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Packet switching paradigms
Bridges and extended LANs
Cell switching
Switching hardware
Design of Switches
• Design goals: Throughput, Scalability, Cost
• Throughput:
– Is not equal to the sum of speeds of input/output links
– Depends also on packet size (some operations have to
be executed for all packets independently of their size):
packet per second metric
=> Throughput is a function of traffic
• Scalability:
– How does hardware cost increase as a function of
IN/OUT
Ports and Fabrics
• Ports:
– Functions: Interface with links, buffer packets,
maintain tables for VCI (incoming/outgoing VCI)
– FIFO buffers are not suitable because of head-of-line
blocking
– QoS policies have to be embedded in the buffer
management (e.g., scheduling, discarding)
• Fabrics:
– Function: deliver packet to the right output
Workstation-Based
• Aggregate bandwidth
– 1/2 of the I/O bus bandwidth
– capacity shared among all hosts connected to switch
– example: 800Mbps bus can support 8 T3 ports
• Packets-per-second
– must be able to
switch small packets
– 100,000 packets-persecond is achievable
– e.g., 64-byte packets
implies 51.2Mbps
I/O bus
CPU
Interface 1
Interface 2
Interface 3
Main memory
Switching Hardware
• Design Goals
– throughput (depends on traffic model)
– scalability (a function of n)
Input
port
Output
port
Input
port
Output
port
Fabric
• Ports
Input
port
Output
port
Input
port
Output
port
– circuit management (e.g., map VCIs, route datagrams)
– buffering (input and/or output)
• Fabric
– as simple as possible
– sometimes do buffering (internal)
Buffering
• Wherever contention is possible
– input port (contend for fabric)
– internal (contend for output port)
– output port (contend for link)
• Head-of-Line Blocking
– input buffering: avoid FIFO
2
1
2
Port 1
Sw itch
Port 2
Crossbar Switches
Knockout Switch
Inputs
• Example crossbar
• Concentrator
– select l of n packets
• 2x2 switches randomly
select a winner
• Complexity is still n2
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D
1
2
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3
Outputs
4
Knockout Switch (cont)
• Output Buffer
Shifter
(a)
Buffers
Shifter
(b)
Buffers
Shifter
(c)
Buffers
Self-Routing Fabrics
• Banyan Network
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constructed from simple 2 x 2 switching elements
self-routing header attached to each packet
elements arranged to route based on this header
no collisions if input packets sorted into ascending order
complexity: n log2 n
001
011
001
110
111
011
110
111
Self-Routing Fabrics (cont)
• Batcher Network
– switching elements sort two numbers
• some elements sort into ascending (clear)
• some elements sort into descending (shaded)
– elements arranged to implement merge sort
– complexity: n log22 n
• Common Design: Batcher-Banyan Switch
High-Speed IP Router
• Switch (possibly ATM)
• Line Cards + Forwarding Engines
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link interface
router lookup (input)
common IP path (input)
packet queue (output)
• Network Processor
– routing protocol(s)
– exceptional cases
Line card
(forwarding
buffering)
High-Speed Router
Routing
CPU
Line card
(forwarding
buffering)
Line card
(forwarding
buffering)
Line card
(forwarding
buffering)
Routing software
w/ router OS
Buffer
memory
Alternative Design
NI with
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NI with
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NI with
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NI with
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NI with
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NI with
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PC
PC
CPU
CPU
MEM
MEM
PC
CPU
MEM
PC
PC
Crossbar
Switch
CPU
MEM
PC
CPU
CPU
MEM
MEM
NI with
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NI with
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NI with
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NI with
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NI with
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NI with
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