Transcript MSP430 Architecture and Instructions

ECE 447 Fall 2009
Lecture 4: TI MSP430
Architecture and Instruction Set
ECE447: MSP430 Assembly language
• Specific to the platform (ie: The MSP430).
• No data types, structures, or explicit
execution control (for, while, if, switch)
• Define locations for and variables and
program code.
• No complex instructions, such as long
integer math, floating point.
• Close coupling to the hardware (registers,
peripherals and input/output ports)
• Teaches a more in depth appreciation for
the device architecture.
ECE 447: Levels of Software
High-level language
(C, C++, Pascal)
compiler
Assembly language (MSP430, 8051, Z80)
assembler
Object code
linker
Machine language
ECE 447: Levels of Software
C
Pascal
Pseudocode
MSP430
8051
compiler
Z80
assembler
Object
code
Object
code
Object
code
linker
Machine
language
Machine
language
Machine
language
ECE447: Assembly vs. Machine code for the
MSP430
mov.w R5, R6
15 – 12
Opcode
11 – 8
S-reg
; 4506 – Machine code translation
7
6
54
Ad B/W As
3–0
D-reg
• Opcode (4 bits):
• Operation Code
• S-reg and Dreg (4 bits each):
• Specifies CPU registers associated with the src and dst
• Ad (1 bit):
• Gives mode of addressing for dst
• B/W (1 bit):
• chooses whether the operand is a byte (1) or a word (0)
• As (2 bits):
• gives the mode of addressing for the src
ECE 447: Features of Assembly Language
1. Very hardware dependent
2. Not very portable (if at all)
3. Very detailed (responsible for all register contents)
4. No inherent data types
5. Requires programming discipline
6. Difficult to document
7. Access to all hardware intricacies of the chip
8. Fastest execution
9. Small memory usage
ECE447: MSP430 Register Structure
PC: Program Counter
• Contains the address of the next instruction to be executed.
SP: Stack Pointer
• Contain the address of the stack frame. The stack is primarily
responsible for storing the return address of subroutine calls.
SR: Status Register
• Contains a set of flags
CG1/CG2: Constant Generator
• Provides the six most frequently used values so that they do not need
to be fetched from memory.
ECE 447: MSP430 Status Register (SR)
• V - Overflow, set when a result of a signed operation has
overflowed.
• N - Negative, set to the msb of the result which indicates a negative
number if the values are signed.
• Z - Zero, set when the result is 0.
• C - Carry, set to indicate an arithmetic operation is too larger to fit in
the destination space.
• GIE - General Interrupt Enable - Set to enable the maskable
interrupts.
• OSCOFF, CPUOFF, SCG0, SCG1 - bits to control the mode of
operation of the MCU. Will be covered in detail in discussion of Low
Power Modes.
ECE447: Groups of Instructions (1)
– Movement - general (mov)
– Movement - stack (push, pop)
– Arithmetic
• i.
One Operand (clr, dec, inc, test)
• ii.
• iii.
Two Operands (add, sub, cmp)
Decimal Arithmetic (dadd, dadc)
– Logic Instructions
• i.
• ii.
One Operand (inv(ert))
Two Operands (and, xor, bis, bic)
ECE447: Groups of Instructions (2)
– Status Register Instructions
• clr(c/z/n): clear specified bits
• set(c/z/n): set specified bits
• dint/eint: disable/enable interrupts
– Shift and Rotates
• rla, rra: arithmetic shift left/right
• rlc, rrc: rotate through carry left/right
– Byte Manipulation
• swpb: swap bytes (word only)
• sxt: sign extend (word only)
ECE447: Groups of Instructions (3)
– Flow Control Operations
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•
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br: branch (go to)
call: call a subroutine
ret: return from subroutine
reti: return from interrupt
nop: no operation (consumes one cycle)
– Jumps
• jmp: unconditional jump
• conditional jmp’s: various conditional jumps
ECE447: MSP430 Operand width notation
• Most MSP430 instructions can operate on
either 8 or 16 bit data.
• In MSP430X device the 20 bit address bus
is also supported for operands.
• The move instruction:
– mov.b - Operands will be byte wide
– mov.w - Operands will be word (16-bit) wide
– mov.a - Operands will be address word (20bit) wide
ECE447: Move Instruction (mov)
• Only one mov instruction to move data
• Can address all of memory as either source or
destination, including all registers.
• Note: The MSP430 mov instruction does not
affect the SR register bits.
Addressing Modes
The ways in which operands can
be specified
Register Mode
Indexed Mode
Indexed Mode (cont.)
Symbolic Mode
Symbolic Mode (cont.)
Absolute Mode
Absolute Mode (cont.)
Indirect Register Mode
Indirect Register Mode (cont.)
Indirect Autoincrement Mode
Indirect Autoincrement Mode (cont.)
Immediate Mode
Immediate Mode (cont.)
Addressing Mode Summary
Addressing Mode Examples
Register
Indexed
Absolute
Indirect
Immediate
ECE447: MSP430 Constant Generator and
Emulated Instruction
• Two registers in the MSP430 allow up to 7
common constant values.
• R3/CG2 and R2/SR/CG1 when accessed
in various addressing modes provide “0”
base for absolute addressing and six
immediate values 0,1,2,4,8, and 0xFFFF.
• The instruction that use these values are
“emulated,” that is no actual machine
instruction exists for the mnemonic
ECE447: MSP430 Constant Generator and
Emulated Instruction
Instruction
Explanation
Emulation
nop
No operation commenced
mov R3, R3
Summary
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Assembly Rocks!
MSP430 Registers
Instruction Types
The mov command
Addressing Modes