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Instruction Set Architectures
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Outline
Overview of the Instruction Set Level
Addressing Modes
Stack-Based Instruction Sets
Compilation Process
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Instruction Set Architecture
An instruction set architecture (ISA) is the interface
between the software and the processor.
Sometimes referred to as simply the architecture of the
processor.
The ISA consists of the elements that are visible and relevant
to building software that runs on that processor:
Instruction set
Memory model
Registers (including special purpose registers)
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ISAs and Microarchitecture
The internal design of the processor is the microarchitecture
(next unit in the course).
Not necessary to understand the internal design to write
functional programs.
For optimal performance, it is also helpful to understand the
microarchitecture too.
The separation of ISA and microarchitecture allows different
microarchitectures to implement the same ISA.
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Instruction Set
What are key design issues when designing an instruction set?
Key questions:
Is it compatible with its predecessor?
Can I run my old OS on it?
Will it run all my existing application programs unmodified?
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Memory Model
Key decisions for memory:
Byte-addressable vs. word-addressable
How big is a word?
Memory alignment restrictions
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Registers
All processors have some registers that are visible at the ISA level.
How many general-purpose registers should a machine have?
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Special Registers
A processor will have some special registers that may or may
not be directly specified within an assembly language
instruction.
Most are indirectly accessed – read and/or written without
being specified by the instruction.
Examples:
Program counter: Pointer to current instruction.
Stack pointer: Pointer to the top of the program stack.
Status flags register: Contains flags for overflow, zero, etc.
It is called the Program Status Word (PSW) in the text.
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Example: Intel Core i7 Registers (32bits)
*EAX: Accumulator
*EBX: Pointers
*ECX: Length of string
*EDX: Used along with EAX to store 64-bit
products and dividends
*ESI: Source string
*EDI: Destination string
EBP: Frame pointer
ESP: Stack pointer
CS-GS, SS: Segment registers (archaic)
EIP: Instruction pointer (program counter)
EFLAGS: Status register
*Can be used as a general-purpose register
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EFLAGS Register
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FP and MMX Registers
In addition to these registers, the Core i7 also includes:
Eight 80-bit floating point registers
Eight 64-bit MMX registers
Sixteen 128-bit XMM registers
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Packed Registers
The MMX and XMM stored pack multiple pieces of data
into a single register:
Source:
Intel
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Vector Operations
Special instruction operate on these values as such. This is
useful for vector calculations:
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Variable-Length vs. Fixed-Length
Instruction Sets
Variable-length instruction set: The length of an individual
instruction can vary.
Advantages:
Does not waste space (instructions with few operands can be small)
Can add new instructions to the instruction set.
Example: Intel
Fixed-length instruction set: Each instruction is the same size.
Advantages:
Easy to decode (significantly less hardware required)
Can determine where the instruction boundaries are
Example: ANNA, MIPS
WINNER?
Fixed-length instruction sets
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Load-Store Architecture
Load-Store Architecture: Only load and store instructions can
access memory. Other instructions must use registers to access data.
Advantages:
Handling memory accesses separately from other computations simplifies and
improves the performance of the underlying microarchitecture.
Example: ANNA, MIPS
Non Load-Store Architecture: Any instruction can access memory
to get its operands and/or store its result.
Advantages:
More flexibility for the assembly language programmer.
Fewer instructions are needed.
Example: Intel
WINNER?
Load-Store Architecture
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Instruction Types
What kinds of instructions should an instruction set have?
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Number of Operands
Another key decision: “How many operands in arithmetic and
logical operations?”
ANNA instructions have three operands: one destination and
two source operands.
It is also possible to have fewer operands.
Fewer operands smaller instruction sizes
Fewer operands less flexibility
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Number of Operands
Two operands: One destination also serves as the source.
One operand: Accumulator-based instruction sets. An
accumulator serves as an implicit source and destination.
Zero operands: Stack-based instruction sets
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Outline
Overview of the Instruction Set Level
Addressing Modes
Stack-Based Instruction Sets
Compilation Process
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Addressing Modes
An addressing mode is a way of determining where the
operand for a particular instruction is located.
Different types:
Immediate addressing
Register addressing
Memory addressing
direct, register indirect, indexed, stack
PC-relative addressing
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Immediate Addressing
Immediate addressing: Operand comes from immediate
in instruction
Example from ANNA:
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Register Addressing
Register addressing: Operand comes from a register
Example from ANNA:
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Direct Addressing
Direct Addressing: Operand comes from memory. The
memory address is given in the instruction as an immediate.
Example:
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Direct Addressing Issues
Memory location is hard-coded (OK for global variables,
doesn't work for local variables)
Requires an instruction format that allows for the entire
address to be included in the immediate.
ANNA does not support direct addressing for this reason.
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Register Indirect Addressing
Register Indirect Addressing: Operand comes from
memory. The memory address is stored in a register. The
register acts as a pointer in this addressing mode.
How is it beneficial over direct addressing?
Example from ANNA:
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Indexed Addressing
Indexed Addressing: Operand comes from memory.
The memory address is computed by adding a base
address that comes from a register and an offset (or
index) that comes an immediate.
Also called: base + offset addressing
Example from ANNA:
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Indexed Addressing
Indexed addressing is useful for:
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Stack Addressing
Stack Addressing: Operand comes from memory,
specifically the top of the stack. The address comes from a
special stack pointer register.
Example from IJVM:
IADD: pop two words from stack; push their sum
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PC-Relative Addressing
PC-relative addressing: A variant on indexing addressing
that uses the PC as the base register.
Only useful for branch / jump instructions.
Example from ANNA:
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PC-Relative Addressing Advantages
Do not need to know absolute address of target ahead of
time, only how far away the target is.
Allows code to be relocated to a different part of the address
space without modification.
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Outline
Overview of the Instruction Set Level
Addressing Modes
Stack-Based Instruction Sets
Compilation Process
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Stack-Based Instruction Sets
A stack-based instruction set uses a stack to store local
variables and temporary values.
This stack is the same program stack accessed by variables.
No registers except for special registers.
The most popular example of a stack-based instruction set is
the JavaVirtual Machine (JVM) instruction set.
Also known as Java bytecodes.
The book and these notes briefly describe IJVM or Integer JVM
– a subset of integer JVM instructions.
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Stack-Based Instruction Set Operations
Arithmetic operations:
1. Pop the top two values on the stack.
2. Perform the operation.
3. Push the result onto the top of the stack.
Memory operations:
Load: push value from memory onto the stack.
Store: pop value from stack into memory.
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IJVM Memory Model
Recall that programs consists of four memory sections:
Code: Machine code instructions
Data: Global variables / constants used by the program
Stack: Stores parameters and local variables
Heap: Memory dynamically allocated by the program
In “register-based” instruction sets, registers are used to store
frequently used local variables and temporary results.
The stack is used if there are enough registers.
In stack-based instructions sets, all local variables and
temporary results are stored on the stack.
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IJVM Memory Model
CPP: Constant Pool Pointer
SP: Stack Pointer
LV: Local Variable Frame Pointer
PC: Program Counter
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IJVM Instructions
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IJVM Example
F
Java code
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IJVM code
machine code
IJVM Example: Stack During Execution
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Outline
Overview of the Instruction Set Level
Addressing Modes
Stack-Based Instruction Sets
Compilation Process
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Source Code to Execution
Source
Assembly
Compiler
Assembler
Library
Library
Library
Loader
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DLL
DLL
DLL
Object File
Linker
Executable
Compiler
The compiler converts C++ (or any language) into assembly
code.
In g++, run compiler only using –S:
g++ -S prog.cpp
(produces prog.s)
Two major parts: front-end and back-end
Front-end
Parses high level language
Checks for syntax errors
Back-end
Optimizes code
Allocates registers
Produces assembly code
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Assembler
The assembler converts assembly file (.s file) to object file (.o
file).
In g++, use –c to stop at the object code level:
g++ -c prog.s
g++ -c prof.cpp
(both produce prog.o)
Generally a simple translation: Assembly instructions map to a
machine instruction.
Assembler provides directives, pseudo-instructions, and labels to
make programming easier.
The assembler typically makes two passes.
During the first pass, it determines the addresses of the labels.
The actual conversion to machine code occurs during the second
pass.
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Multiple File Compilation
Individual source code files are compiled and assembled
separately.
The linker is responsible for linking the individual source
code files into a single executable.
Even if all the code were contained in a single code, the
object file is still not executable: the format of an object
file and executable are different.
• A library is a package of (related) object files.
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Producing Machine Code
The assembler does not have enough information to produce
executable machine code.
References to labels in another file:
May need to call a function in another file.
May need to access a variable in another file.
Cannot fill in the immediate values.
Assembler assumes file starts at address 0 (or another fixed
address).
Not every file can start at 0.
Need to relocate the file and change the direct addresses.
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Object Files
Object file contain more than machine code. The format
of an object file is as follows:
Identification
Entry Point Table
External Reference Table
Code
Data / Constants
Relocation Dictionary
Debug Info
End of Module
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Object Files
Identification: Contains the starting points and sizes of the
remaining sections and other information needed by the linker.
Entry Point Table: A table of <label, address> pairs that are
visible to other object files. The labels correspond to functions
and global variables that other object files might want to access.
Example: If object file A has defined function foo, an entry to foo
with its starting address appears in the entry point table.
External Reference Table: A list of labels used in this file but are
not defined and expected to be another file. Contains a list of
functions called and global variables used that are defined in a
different file.
Example: If object file B calls foo but foo is defined in a different file,
the label foo will appear in the external reference table.
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Object Files
Code: Contains the machine code.
Data / Constants: Contains initialized global variables and
constants.
Relocation Dictionary: Contains a list of instructions or data
entries that refer to direct addresses. If the linker relocates the file
to a different place in memory, these instructions will need to be
updated with their new addresses.
Debug Info: Additional information regarding variable names and
source code line numbers that is used by debuggers.
This section is only present if compiled with debugging turned on (-g in g++).
End of module: Marks the end of the object file, possibly with a
checksum to check for corrupt files and additional information.
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Linker
The linker stitches independently created object files into a single
executable file. In particular:
1.
Gather the addresses for all labels in the entry point tables.
• An error occurs if the same label appears twice.
2.
Replace all external references with the appropriate addresses.
• An error occurs if an external reference is not found.
3.
Place all the code together into one code section.
• The code in each file is guaranteed to stay together.
4.
5.
Place all the data together into one data section.
Relocate all the addresses reference in the program to reflect the new
addresses.
• Not needed for PC-relative targets.
6.
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Produce the executable file.
Linking Example
Executable
File
A
File
B
Text
Text
Data
Text
Text
Text
Data
Data
Data
File
C
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Text
Data
Data
Loader
The loader copies the executable file from disk into
memory.
Asks the operating system to schedule the executable as a
new process.
Used to be a straight forward process.
Now portions of the compiling / assembly / linking process are
deferred to load time (or even run time).
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Dynamically Linked Libraries (DLLs)
Dynamically linked libraries are not linked nor loaded
until run-time.
Many system libraries are linked dynamically.
Advantages:
Only load portions of the program that are actually executed.
Multiple processes can share the same code in memory.
Easier to update libraries (don’t need to recreate new executables).
Disadvantages
Slower – overhead due to linking while the program is running.
Complexity – OS support is needed.
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Thank You!
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