Transcript History-Perofrmance

Introduction to Computer
Architecture
SCHOOL OF ELECTRICAL AND COMPUTER ENGINEERING
SUMMER 2015
RAMYAR SAEEDI
Course Outline
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Computers!
Computer Architecture’s Components (Big Picture)
Performance Measurements
Digital System Design Background
Number Representation and Operation
MIPS Microprocessor and Assembly Language
Processor Design Components
Advanced Concepts(Pipeline, Control, Data path)
Memory(Types, Cache…)
Input/output
….
Course Structure
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Homework Assignments (4-5 set) (30-35%)
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One or two midterms (30-40%)
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Final exam(40%-45%)
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Bonus PROGECT(10-15%)
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Resources
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Main: Computer Organization and Design — The Hardware Software
Interface – 5th Edition, David Patterson and John Hennessy
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Digital Design and Computer Architecture: ARM Edition, Sarah Harris
David Harris
Course Structure(Cont.)
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We will have two review sessions
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Two workshops on assembly programming/digital design
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3rd and 5th week of class
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Office Hours: Tuesday-Thursday 2pm-3pm; Sloan 314
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Programming background(e.g. c++, java)
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Contact: [email protected]
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Homepage of Course: http://epsl.eecs.wsu.edu/introduction-tocomputer-architecture/
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HWs and announcement will be posted on the homepage!
What You Will Learn
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How programs are translated into the machine language
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And how the hardware executes them
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The hardware/software interface
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What determines program performance
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And how it can be improved
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How hardware designers improve performance
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What is parallel processing!
Components of a Computer
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Same components for all kinds of
computer
 Desktop,
server,
embedded
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Input/output includes
 User-interface
 Display,
 Storage
 Hard
keyboard, mouse
devices
disk, CD/DVD, flash
 Network
 For
devices
adapters
communicating with other computers
The BIG Picture
Programming Levels
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High-level language
 Level
of abstraction closer to problem domain
 Provides for productivity and portability
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Assembly language
 Textual
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representation of instructions
Hardware representation
 Binary
digits (bits)
 Encoded instructions and data
Inside the Processor
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Apple A5
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Different Components?
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What do you think?
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Memory?
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Cores?
Response Time and Throughput
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Response time
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How long it takes to do a task
Throughput
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Total work done per unit time
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e.g., tasks/transactions/… per hour
How are response time and throughput affected by
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Replacing the processor with a faster version?
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Adding more processors?
We’ll focus on response time for now…
Relative Performance
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Define Performance = 1/Execution Time
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“X is n time faster than Y”
Performanc e X Performanc e Y
 Execution time Y Execution time X  n
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Example: time taken to run a program
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10s on A, 15s on B
Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
So A is 1.5 times faster than B
CPU Clocking
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Operation of digital hardware governed by
a constant-rate clock
Clock period
Clock (cycles)
Data transfer
and computation
Update state
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Clock period: duration of a clock cycle
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e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second
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e.g., 4.0GHz = 4000MHz = 4.0×109Hz
Performance Improvement
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How?
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Reducing number of clock cycles
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Increasing clock rate
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Hardware designer must often trade off clock rate against cycle
count
CPU Time  CPU Clock Cycles  Clock Cycle Time
CPU Clock Cycles
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Clock Rate
Instruction Count and CPI
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Instruction Count for a program
 Determined
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by program, ISA and compiler
Average cycles per instruction
 Determined
by CPU hardware
 If different instructions have different CPI
 Average
CPI affected by instruction mix
Clock Cycles  Instructio n Count  Cycles per Instructio n
CPU Time  Instructio n Count  CPI  Clock Cycle Time
Instructio n Count  CPI
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Clock Rate
CPI Example
Computer A: Cycle Time = 250ps, CPI = 2.0
 Computer B: Cycle Time = 500ps, CPI = 1.2
 Same ISA
 Which is faster, and by how much?
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CPU Time
CPU Time
A
 Instructio n Count  CPI  Cycle Time
A
A
 I  2.0  250ps  I  500ps
A is faster…
B
 Instructio n Count  CPI  Cycle Time
B
B
 I  1.2  500ps  I  600ps
B  I  600ps  1.2
CPU Time
I  500ps
A
CPU Time
…by this much
CPI in More Detail
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If different instruction classes take different numbers of cycles
n
Clock Cycles   (CPIi  Instructio n Count i )
i1
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Weighted average CPI
n
Clock Cycles
Instructio n Count i 
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CPI 
   CPIi 
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Instructio n Count i1 
Instructio n Count 
Relative frequency
CPI Example
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Alternative compiled code sequences using
instructions in classes A, B, C
Class
A
B
C
CPI for class
1
2
3
IC in sequence 1
2
1
2
IC in sequence 2
4
1
1
Sequence 1: IC = 5
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Clock Cycles
= 2×1 + 1×2 + 2×3
= 10
Avg. CPI = 10/5 = 2.0
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Sequence 2: IC = 6
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Clock Cycles
= 4×1 + 1×2 + 1×3
=9
Avg. CPI = 9/6 = 1.5
Performance Summary
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Performance depends on
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Algorithm: affects IC, possibly CPI
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Programming language: affects IC, CPI
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Compiler: affects IC, CPI
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Instruction set architecture: affects IC, CPI, Tc
Instructio ns Clock cycles
Seconds
CPU Time 
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Program
Instructio n Clock cycle
Amdahl’s Law
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Improving an aspect of a computer and expecting a proportional
improvement in overall performance
Taf f ected
Timprov ed 
 Tunaf f ected
improvemen t factor
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Example: multiply accounts for 80s/100s
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How much improvement in multiply performance to get 5× overall?
80
20 
 20
n
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Corollary: make the common case fast
Can’t be done!