Transcript CPS104: Computer Organization & Programming

CPS104
Computer Organization
Lecture 1
January 14, 1999
Gershon Kedem
Slides available on:
http://kedem.cs.duke.edu/cps104/Lectures.html
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©GK Spring 1999
CPS104: Computer Organization
Instructor: Gershon Kedem
Office: LSRC D342, 660-6555 [email protected]
Office Hours: Tue. & Thur., 3:30 - 4:30pm or by appt.
TA:
Zheng (Eric) Zhang
Office: Room 03 North Bld.
Office Hours: Mon. 3:30-4:30, Thur. 1:00-2:00,
or by appt.
UTAs:
Tanner Mueller, David E. Shifren, Joseph Tate,
Corey Miller, Brijal Padia, (Iris Liu ?)
Text:
Computer Organization & Design: The Hardware /
Software Interface (2nd edition).
Web page:
http://kedem.cs.duke.edu/cps104/
Newsgroup: duke.cs.cps104
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Course Outline:

1.Introduction to Computer Organization.

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2.Instruction Set Architecture.
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What is in the box.
Integer and Floating point representation.
Basic data structures.
The MIPS Processor.
Assembly level programming.
Instructions and data types representations.
Addressing, procedure calls and Exceptions.
Linking & Loading.
3.Digital Logic:
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
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Introduction: Digital Gates and Boolean Algebra.
Arithmetic and Logic circuits,
Other Functional Units
Flip-flops, Registers and Tristate drivers
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Course Outline (continue):
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4.Single Cycle Per Instruction Processor.
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
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The Datapath.
Executing Instructions
Control
5.Interrupts.
6.The Memory Hierarchy.
Cache Memory.
 Virtual Memory and Paging.


7.I/O Devices.
 I/O
storage devices.
 I/O buses and arbitration
 LANs and WANs.

8.Advanced processors:
 Pipelined
Processor.
 Super-Scalar processor.

9.Advanced Computer Architecture. (If there is time).
Fast Interconnects
 Parallel Machines

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Grading

Grade breakdown
 Midterm
Exam:
 Final Exam:
 Homework Assignments

18%
32%
50%
Late homework policy:
No sad stories!
 No “cooperation” on homework (Unless specified in the
assignment).
 10% reduction for each day late.
 No credit after the homework was graded and handed back.


Grades posted on home page:
Password protected Access
 Written/email request for changes to grades.

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Homework-0

Send me ([email protected]) email message with:
your name, year, major and a short description of
your computer science / Engineering background.
 Readings:
Chapter-1, next time we start on data
representations (Chapter-4).
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Course Problems

Can’t make midterm
 Tell

us early and we will schedule alternate time
Forgot to turn in homework/ Dog ate the computer, network
down…..
I
do not accept excuses!
 If
you have a legitimate problem. Talk to me early, email me a
reminder.

What is cheating?
 Studying
together in groups is encouraged
 All written work must be your own. Programs that are substantially
the same as others will receive a grade of 0!
 Common examples of cheating: running out of time on a
assignment and then pick up someone else's output, , person asks
to borrow solution “just to take a look”, copying an exam question,
...
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What You Will Learn

The basic operation of a computer
 primitive
operations (instructions)
 arithmetic
 instruction sequencing and processing
 memory
 input/output
 etc.

Understand the relationship between abstractions
 interface
design
 high-level program to control signals (SW -> HW)

Software performance depends on understanding underlying
HW
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CPS104: Course Overview
Computer Design
Instruction Set Design
Computer Hardware Design
° Machine Language
° Machine Implementation\
° Compiler View
° Logic Designer's View
° "Computer Architecture"
° "Processor Architecture"
° "Instruction Set Processor"
° "Computer Organization"
"Building Architect"
“Construction Engineer”
Few people design computers! Very few design instruction sets!
Many people design computer components.
Very many people are concerned with computer function, in detail.
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The Big Picture

What is inside a computer?

How does it execute my program?
?
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The Big Picture

The Five Classic Components of a Computer
Processor/CPU
Input
Control
Memory
Datapath
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Output
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System Organization
Processor
interrupts
Cache
Memory Bus
I/O Bridge
Core Chip Set
I/O Bus
Main
Memory
Disk
Controller
Disk
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Disk
Graphics
Controller
Graphics
Network
Interface
Network
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What is Computer Architecture?
• Coordination of levels of abstraction
Application
Operating
System
Compiler
CPU
Firmware
Memory I/O system
Digital Design
Circuit Design
Software
Interface Between
HW and SW
Instruction Set
Architecture,
Memory, I/O
Hardware
• Under a set of rapidly changing Forces
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Levels of Representation
temp = v[k];
High Level Language
Program
v[k] = v[k+1];
v[k+1] = temp;
Compiler
lw $15,
lw $16,
sw$16,
sw$15,
Assembly Language
Program
Assembler
Machine Language
Program
0000
1010
1100
0101
1001
1111
0110
1000
1100
0101
1010
0000
0110
1000
1111
1001
0($2)
4($2)
0($2)
4($2)
1010
0000
0101
1100
1111
1001
1000
0110
0101
1100
0000
1010
1000
0110
1001
1111
Machine Interpretation
Control Signal
Specification
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Forces on Computer Architecture
Technology
Programming
Languages
Applications
Computer
Architecture
Operating
Systems
History
(A = F / M)
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Instruction Set Architecture
. . . the attributes of a [computing] system as seen by
the programmer, i.e. the conceptual structure and
functional behavior, as distinct from the
organization of the data flows and controls the logic
design, and the physical implementation.
Amdahl, Blaaw, and Brooks, 1964
SOFTWARE
-- Organization of Programmable
Storage
-- Data Types & Data Structures:
Encoding & Representations
-- Instruction Formats
-- Instruction (or Operation Code) Set
-- Modes of Addressing and Accessing Data Items and Instructions
-- Exceptional Conditions
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Instruction Set Interface
software
instruction set
hardware
use
use
use
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Interface
imp 1
time
imp 2
imp 3
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MIPS I Instruction Set Architecture
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Instruction Categories



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

Load/Store
Computational
Jump and Branch
Floating Point
Memory Management
Special
R0 - R31
PC
HI
LO
3 Instruction Formats: all 32 bits wide
OP
rs
rt
OP
rs
rt
OP
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rd
sa
funct
immediate
jump target
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Organization
ISA Level
FUs & Interconnect
Logic Designer's View
-- Capabilities & Performance Characteristics of
Principal Functional Units
(e.g., Registers, ALU, Shifters, Logic Units, ...)
-- Ways in which these components are
interconnected
-- nature of information flows between components
-- logic and means by which
such information flow is controlled.
Choreography of FUs to realize the ISA
Register Transfer Level Description
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Execution Cycle
Instruction
Obtain instruction from program storage
Fetch
Instruction
Determine required actions and instruction size
Decode
Operand
Locate and obtain operand data
Fetch
Execute
Result
Compute result value or status
Deposit results in storage for later use
Store
Next
Determine successor instruction
Instruction
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Processor Performance
1200
1100
DEC Alpha 21264/600
1000
900
Performance
800
700
600
500
DEC Alpha 5/500
400
300
DEC Alpha 5/300
200
DEC Alpha 4/266
SUN-4/ MIPS MIPS IBM
IBM
POWER
100
100
260
M2000
RS6000
DEC
AXP/500
M/120
HP 9000/750
0
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
Year
1997
Copyright 1998 Morgan Kaufmann Publishers, Inc. All Rights Reserved
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Performance Trends
1000
Supercomputers
Performance
100
Mainframes
10
Minicomputers
Microprocessors
1
0.1
1965
1970
1975
1980
1985
1990
1995
2000
Year
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Technology: Microprocessor Logic Density
10000000
r4400
i80486 r4000
1000000
i80386
i80286
100000
r3010
i8086
10000
i8008
i4004
i8080
1000
1970
1975
1980
1985
1990
1995
2000
Memory: 4x every 3 years
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Processor and Caches
Processor
Module
Processor
Registers
Datapath
Internal
Cache
Control
External Cache
To main memory
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SIMM Slot 7
SIMM Slot 6
SIMM Slot 5
SIMM Slot 4
SIMM Slot 3
SIMM Slot 2
SIMM Slot 1
Memory
Controller
SIMM Slot 0
Memory
Memory Bus
DRAM SIMM
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DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
DRAM
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Summary
Goal

Understand basic operation of a computer
Why?

Software performance is affected/determined by HW capabilities

Future Computer Architects (Processor or System)
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Summary (Continued)
Agenda

Map “high-level” software to instructions

Instructions are composed of hardware primitives
 how
to use them
 how
to implement them
 why a particular primitive

Memory for storing instructions and data
 Main
memory
 Caches
 interaction

with operating system
Input/Output
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Summary (Continued)

All computers consist of five components
 Processor:
(1) datapath and (2) control
 (3)
Memory
 (4) Input devices and (5) Output devices

Not all “memory” created equally
 Cache:
fast (expensive, small) memory close to the processor
 Main memory: slower, cheaper, larger memory farther from
processor

Input and output (I/O) devices has the messiest organization
 Wide
range of speed: graphics vs. keyboard
 Wide range of requirements: speed, standard, cost ... etc.
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Next Time

Data Representations
Reading

Chapter 4.1-4.3, 4.8 pages 275-280

Read Chapter 1, Skim 2

Start reading Chapter 3
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