Transcript Register

Chap.2:
Instructions: Language of the computer
Jen-Chang Liu, Spring 2006
Adapted from
http://www-inst.eecs.berkeley.edu/~cs61c/
Example for Lab#1: 印出 sum=5
.globl main
main:
str:
.data
.asciiz "sum="
.text
li $v0, 4
la $a0, str
syscall
li $s0, 2
li $s1, 3
add $a0, $s0, $s1
li $v0, 1
syscall
# $v0=4
# $a0=str
# print the string
# 2+3=5
# print integer
不要亂寫 assembly code
° add $s0, 1
Pseudo-instruction
° SPIM can recognize a large
instruction set than the original MIPS
SPIM
Pseudo-instruction
MIPS
Bare machine
° Example: li (load immediate)
real inst.
Shut down pseudo-instruction option
Outline
°C operators, operands
°Variables in Assembly: Registers
°Comments in Assembly
°Addition and Subtraction in Assembly
指令
°Memory Access in Assembly
Assembly Operands: Memory
°C variables map onto registers; what
about large data structures like arrays?
°1 of 5 components of a computer:
memory contains such data structures
°But MIPS arithmetic instructions only
operate on registers, never directly on
memory.
°Data transfer instructions transfer data
between registers and memory:
• Memory to register: load
• Register to memory: store
MIPS CPU
Memory
store
CPU
Coprocessor 1 (FPU)
load
Registers
Arithmetic
unit
Registers
$0
$0
$31
$31
Multiply
divide
Lo
Arithmetic
unit
Hi
Coprocessor 0 (traps and memory)
Registers
BadVAddr
Cause
Status
EPC
MIPS memory allocation (Textbook Fig2.17)
7fffffffhex
Stack segment
20000000
1 byte
Dynamic data
Static data
• 32 bits addressing
• one byte in an address
Data segment
10000000hex
Text segment
400000hex
Reserved
It is software convention
Data Transfer: Memory to Reg (2/4)
°To specify a memory address to copy
from, specify two things:
• A register which contains a pointer to
memory
• A numerical offset (Max. offset???)
°Example:
8($t0)
• specifies the memory address pointed to
by the value in $t0, plus 8 bytes
°The desired memory address is the
sum of these two values, 8+$t0.
Memory access: 8($t0)
Pointer $t0
(register)
Offset 8
(constant)
Start of an array 8
(constant)
Offset $t0
(register)
Data Transfer: Memory to Reg (3/4)
°Load Instruction Syntax:
1 2,3(4)
Example: lw $t0,12($s0)
• where
1) operation name
2) register that will receive value
3) numerical offset in bytes
4) register containing pointer to memory
°Instruction Name:
•lw (meaning Load Word, so 32 bits (4
bytes) or one word are loaded at a time)
Example: load word
Data Transfer: Reg to Memory (1/2)
°Also want to store value from a register
into memory
°Store instruction syntax is identical to
Load instruction syntax
°Instruction Name:
sw (meaning Store Word, so 32 bits
or one word are loaded at a time)
Data Transfer: Reg to Memory (2/2)
°Example:
sw $t0,12($s0)
This instruction will take the pointer in
$s0, add 12 bytes to it, and then store the
value from register $t0 into the memory
address pointed to by the calculated sum
Pointers v.s. Values
°Key Concept: A register can hold any
32-bit value. (typeless)
• That value can be a (signed) int, an
unsigned int, a pointer (memory
address), etc.
°If you write add $t2,$t1,$t0
then $t0 and $t1
better contain values
°If you write lw $t2,0($t0)
then $t0 better contain a pointer
°Don’t mix these up!
C: word address => assembly: byte address
°What offset in lw to select A[8] in C?
• A is a 4-byte type (ex. long int)
°Compile by hand using registers:
g = h + A[8];
• g: $s1, h: $s2, $s3:base address of A
°4x8=32 bytes offset to select A[8]
° add $s1, 32($s3)
lw $t0,32($s3)
add $s1,$s2,$t0
# $t0 gets A[8]
# $s1 = h+A[8]
More Notes about Memory: Alignment
°MIPS requires that all words start at
addresses that are multiples of 4 bytes
0
1
2
3
Aligned
Not
Aligned
°Called Alignment: objects must fall on
address that is multiple of their size.
Role of Registers vs. Memory
°What if more variables than registers?
• Compiler tries to keep most frequently
used variable in registers
°Why not keep all variables in memory?
• Smaller is faster:
registers are faster than memory
• Registers more versatile:
- MIPS arithmetic instructions can read 2,
operate on them, and write 1 per instruction
- MIPS data transfer only read or write 1
operand per instruction, and no operation
Brief summary (1/2)
°In MIPS Assembly Language:
• Registers replace C variables
• One Instruction (simple operation) per line
• Simpler is Better
• Smaller is Faster
°Memory is byte-addressable, but lw and
sw access one word at a time.
°A pointer (used by lw and sw) is just a
memory address, so we can add to it or
subtract from it (using offset).
Brief summary (2/2)
°New Instructions:
add, addi,
sub
lw, sw
°New Registers:
C Variables: $s0 - $s7
Temporary Variables: $t0 - $t9
Zero: $zero