Transcript Presentation3 - University of Worcester

COMP 1321
Digital Infrastructure
Richard Henson
University of Worcester
October 2015
Week 3: The Fetch-Execute
Cycle
Explain the instruction set of a typical
CPU
 Understand the sequential way a CPU
works, using its instruction set
 Understand how registers and memory
addresses are used to process a CPU
instruction and store the results

CPUs and the SAM
CPUs very, very, very fast
 SAM is a CPU simulator

processes one CPU cycle at a time
designed to allow you to watch what
happens during processing
instructions can require several cycles
What is “Processing”?

Mostly, calculations by ALU:
need data input
» from register
» from external memory
need to store output
» from register
» from external memory

Could also be just a command, no data
CPU types

Most frequently used:
Intel 8086 family
Motorola (esp. 68000 family)
ARM (many mobile phones)

We’ll focus on Intel 8086 family
dates back to original IBM PC…
Role of “Registers”

Memory stores inside the CPU
just the right size “word” of data for ALU
» typically 1, 2, 4 bytes i.e. very small!

Advantage: CPU reads/writes data
very very quickly to/from the registers
Architecture and Buses

Design of CPU
internal connections
external connections to motherboard
» data bus (same word as registers)
» address bus (depends on no of memory locations)
» control bus (messages to/from components)
layout of components on motherboard
Registers (from last week…)
Registers:
high-speed memory on the
CPU chip
Parking places for data on the
move
AX and BX registers are used
for ALU operations
MAR is memory address
register, 4 in eg.
Result, 6+8=14, will go into
memory cell address 4
AX
6
BX
8
0
6
1
8
MAR
R
4
4
Adding Numbers
For example …
Add ax,bx
Instruction
Memory
AX
BX
8
7
8
7
15
mar
0
5
1
8
2
7
3
6
4
1
add ax , bx
… this means ‘
add ax to bx,
put the answer
in ax’
The computer so far…
(identify & name components)
0
1
Instruction
Memory
Data
Memory
mar
ip
4
A couple of extra registers..
Memory Data Register
Instruction Register
1.
add ax,bx
2.
34
Instruction
Memory
Data
•
•
•
Energize ax
Energize bx
Select ALU “add"
1. Line of code goes in…
0
2
1
8
Data
Memory
2
Address
2. Electrical bit signals come out
4
34
Moving data into Registers
(ie from specified location)
for example … mov ax , [1]
mov ax , [1]
mov bx , [2]
Instruction
Memory
AX
8
BX
7
mar
0
5
1
8
2
7
3
6
4
1
mov bx , [2]
Moving data into Memory
For example …
mov [3] , ax
mov [0] , bx
Instruction
Memory
AX
8
mov [3] , ax
mov [0], bx
BX
7
mar
0
7
5
1
8
2
7
3
8
6
4
1
8086 CPU family registers

8086 chip always used a 16-bit word
SAM simulates an 8-bit word
» popular on most early microcomputers…

Typical 8086 registers:
general purpose data: AX, BX, CX, DX
specific use e.g.
» program counter (PC): instruction address in
memory
» stack pointer SP): address of the top of the “stack”
Data and Addressing

General purpose register contents…
data
memory address that points to data

Convention:
data written as hexadecimal equivalent
» e.g. 4A
memory location also has square
brackets
» e.g. [4A]
CPU Instructions
Used to tell the CPU what to do…
 MOV is for moving data around…

MOV AX, 4A – move “4A” into AX register
MOV AX, [4A] – move data contained in
address 4A into AX
register

Many other instructions; range of
operations…
collectively known as an instruction set
each CPU family has its own unique codes
8086 in practice

Four 16-bit General Purpose registers
each gen register (e.g. AX) can be
read/written to upper (AH) & lower (AL) byte
upper byte
lower byte
AX
AH
AL
BX
BH
BL
CX
CH
CL
DX
DH
DL
Another 8086 Instruction: ADD
Takes values from two registers
 Adds them together
 Deposits results back in one of the
registers
 Which one?

the register that appeared first
e.g. “MOV, AX, BX” puts result in AX
Fetch-Execute Cycle
(Organization and Control)
1. Fetch instruction
from memory
5. Write back results
to registers
ax <- ALU
add ax , bx
2. Decode the instruction
and read any registers
ALU <- ax
ALU <- bx
4. Do any Memory
Access
(Data cache)
None needed
3. Do any ALU operations
ax + bx
(execute units)
Fetch-Exec : State 1
Instruction Fetch
add ax , bx
add ax bx
AX
BX
3
1
add ax,bx
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 2
Decode, Register
Operations
add ax , bx
add ax bx
AX
BX
3
1
3
1
add ax,bx
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 3
ALU Operation
add ax , bx
add ax bx
AX
BX
add ax,bx
1
3
4
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 4
Memory Access
add ax , bx
add ax bx
AX
BX
add ax,bx
1
3
4
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 5
Register Write
add ax , bx
add ax bx
BX
add ax,bx
0
3
1
8
2
7
3
1
4
9
4
1
3
4
Fetch-Execute Cycle
(Organization and Control)
1. Fetch instruction
from memory
Data into ax
mov ax , [1]
2. Decode the instruction
and read any registers
Read the ‘1’
5. Write back results
to registers
4. Do any Memory
Access
Read memory
at addr ‘1’
3. Do any ALU operations
Put ‘1’ into MAR
(execute units)
Fetch-Exec : State 1
Instruction Fetch
mov ax , [1]
mov ax , [1]
mov ax
1
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 2
Decode, Register
Operations
mov ax , [1]
mov ax , [1]
mov ax
1
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 3
ALU Operation
mov ax , [1]
mov ax , [1]
mov ax
1
1
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 4
Memory Access
mov ax , [1]
mov ax , [1]
mov ax
1
8
1
0
3
1
8
2
7
3
1
4
9
Fetch-Exec : State 5
Register Write
mov ax , [1]
mov ax , [1]
mov ax
1
8
8
1
0
3
1
8
2
7
3
1
4
9
8088: Brains of the IBM PC
address bus
Inside the 8088
address adder
External
buses
gen registers
ALU
Pentium
1
2
(same
family)
1.
2.
3.
4.
5.
Fetch
Decode
ALU
Mem Ops
Reg Write
3
4
5
Programming a CPU

CPU programming code written as
assembly language
each family has its own instruction set

Programming syntax depends on the
CPU/instructions
how they should be used
Intel 8086 assembly language used for
CPUs that support PC platforms
Example 8086
Assembly Language
MOV AH,08
INT 21
MOV DL,AL
MOV AH,02
INT 21
MOV AH,4C
INT 21
So THAT’S how it all works!

now you try it on SAM2…
Next week: a focus on writing
programs and i/o