Transcript Lecture 2 - Basic Instructions

Lecture 2: Basic Instructions
EEN 312: Processors:
Hardware, Software, and
Interfacing
Department of Electrical and Computer Engineering
Spring 2014, Dr. Rozier (UM)
COURSE PLAN FOR TODAY
1.
2.
3.
4.
Lab 1 Introduction
Introduction to debugging with GDB
Introduction to Instructions
Lab 1 GDB demo
LAB 1
Lab 1: Binary Bomb
• Quick change to the syllabus
– Due dates will now be the Monday before the
next lab goes out. Gives everyone an automatic
extension for all labs.
• Lab 1 is out today
• Due Monday, February 3rd at 11:59pm.
Lab 1: Binary Bomb
• Your task is to solve a series of six stages by
finding the password.
• You will get a unique compiled binary.
• You will need to disassemble this binary to
find the passwords.
Lab 1: Binary Bomb
• If you enter a wrong password, the bomb will
“explode” and notify us.
• The bomb has tamper proof protections. Do
not try to run it on a non-lab computer, or it
will notify us and abort!
• Each explosion deducts half a
point from your lab score.
Lab 1: Binary Bomb
Assignment Part
Points
Phase 1
10
Phase 2
10
Phase 3
10
Phase 4
10
Phase 5
15
Phase 6
15
Write up
10
Explosions
-0.5 each
80 pts maximum score
Lab 1: Binary Bomb
• If you do things right, your bomb should never
blow up! Think carefully!
• Use the debugger gdb to step through and
analyze the program.
– Figure out what the code is doing to check for a
correct result, and how to pass the checks.
Lab 1: Binary Bomb
• Start early! The lab will not be easy!
• Bomb download site:
– http://een312.performalumni.org:15213/
• Bomb scoreboard:
– http://een312.performalumni.org:15213/scorebo
ard
GDB: THE GNU DEBUGGER
gdb: The GNU Debugger
• Standard and portable debugger for Unix and
Unix-like systems.
– Originally written in 1986
– Very active tool. Three software releases in 2013.
– Still the gold-standard for debugging
• Enables users to trace, alter, and execute
computer programs in a controlled
environment.
gdb: The GNU Debugger
• Most useful features
– Step through program execution, line by line, or
instruction by instruction.
– Examine the values of variables and registers.
– Trap system signals.
– Set breakpoints to halt execution at any point.
– Watch variables to see when they change.
gdb: The GNU Debugger
• Some commands
– run – executes the program
– break <NAME> - sets a breakpoint at label
<NAME>
– break *<ADDRESS> - sets a breakpoint at the
address <ADDRESS>
– print <REGISTER> - prints the register’s value
– stepi – step through one assembly instruction
gdb: The GNU Debugger
• Some commands
– disas <NAME> - disassemble the code at label
<NAME>.
– continue – continue execution after halting at a
breakpoint.
– info [break|<REGISTER>] - give information about
breakpoints or registers
– info r – display the value of all registers
– x/<FMT> <ADDRESS|REGISTER> - display the value
stored at <ADDRESS|REGISTER> in the format
specified by <FMT>
gdb: The GNU Debugger
We will show an example towards the end of
class of the debugger in action.
BASIC INSTRUCTIONS
Instruction Set
• The repertoire of instructions of a computer
• Different computers have different instruction
sets
– But with many aspects in common
• Early computers had very simple instruction
sets
– Simplified implementation
• Many modern computers also have simple
instruction sets
MIPS vs ARMv6
• The book uses the MIPS instruction set.
• We will be using ARMv6 in our labs.
• Both are RISC (reduced instruction set
computer) architectures.
– Many similarities.
MIPS
• Used in many embedded systems
– Routers, gateways
– Playstation 2 and PSP
• Invented by Prof John Hennessy at Stanford,
the first RISC architecture.
ARM
• Introduced in 1985
• Focused on low-power friendly operation.
• Since 2005, over 98% of all mobile phones had
at least one ARM processor.
• Over 37 billion ARM processors in use in 2013.
• Rapidly becoming the dominant processor
architecture in the world.
Instructions
• C code:
– f = (g + h) – (i + j);
• Compile ARM code:
– add r0, r3, r4 # temp t0 = g + h
– add r1, r5, r6 # temp t1 = i + j
– sub r2, r0, r1 # f = t0 – t1
Register Operands
• Instructions use registers for operands.
• Registers are extremely fast SRAM locations
that are directly accessible by the processor.
– Very fast, but very expensive, so very small.
Registers
• Each register holds a word (4 bytes).
• Registers r0-r12 are general purpose.
Name
Function
Name
Function
r0
General Purpose
r8
General Purpose
r1
General Purpose
r9
General Purpose
r2
General Purpose
r10
General Purpose
r3
General Purpose
r11
General Purpose
r4
General Purpose
r12
General Purpose
r5
General Purpose
r13
Stack Pointer
r6
General Purpose
r14
Link Register
r7
General Purpose
r15
Program Counter
Registers
• Registers r13 – r15 have special purposes
• The PC, r15, is very dangerous.
Name
Function
Name
Function
r0
General Purpose
r8
General Purpose
r1
General Purpose
r9
General Purpose
r2
General Purpose
r10
General Purpose
r3
General Purpose
r11
General Purpose
r4
General Purpose
r12
General Purpose
r5
General Purpose
r13
Stack Pointer
r6
General Purpose
r14
Link Register
r7
General Purpose
r15
Program Counter
Registers
• The register r13 holds the stack pointer
– Also called sp
– Points to a special part of memory called the
stack.
– More about this later.
Registers
• The register r14 holds the link register
– Also called lr
– Holds the value of a return address that allows for
fast and efficient implementation of subroutines.
Registers
• The register r15 holds the program counter
– Also called pc
– Holds an address of an instruction. Keeps track of
where your program is in its execution of machine
code.
– PC holds the address of the instruction to be
fetched next.
Registers
• One additional register, the “current program
status register”
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
• Four most significant bits hold flags which
indicate the presence or absence of certain
conditions.
Registers
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
•
•
•
•
N – negative flag
Z – zero flag
C – carry flag
V – overflow flag
Registers
• N – set by an instruction if the result is
negative (set equal to the two’s complement
sign bit)
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
•
•
•
•
N – negative flag
Z – zero flag
C – carry flag
V – overflow flag
Registers
• Z – set by an instruction if the result of the
instruction is zero.
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
•
•
•
•
N – negative flag
Z – zero flag
C – carry flag
V – overflow flag
Registers
• C – set by an instruction if the result of an
unsigned operation overflows the 32-bit
register. Can be used for 64-bit arithmetic
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
•
•
•
•
N – negative flag
Z – zero flag
C – carry flag
V – overflow flag
Registers
• V – works the same as the C flag, but for
signed operations.
31
30
29
28
27…8
7
6
5
4…0
N
Z
C
V
Reserved
I
F
T
MODE
•
•
•
•
N – negative flag
Z – zero flag
C – carry flag
V – overflow flag
MORE ABOUT THESE LATER…
The Memory Hierarchy
Load-Store Architecture
• RISC architectures, like ARM and MIPS utilize a
load-store architecture.
• Memory cannot be part of arithmetic
operations.
– Only registers can do this
• Access memory is through loads and stores.
Register Memory Architecture
• Featured on many CISC architectures, like x86
• Allows direct access to memory by
instructions.
Load Store and ARM
•
•
•
•
Register space is pretty cramped!!!
LoaD to a Register with LDR
SToRe to memory with STR
ldr <register>, [<base>{,<offset>}]
– Loads a byte from <base>+<offset> into <register>
• str <register>, [<base>{,<offset>}]
– Stores a byte from <register> into <base>+<offset>
Load Store and ARM
• Example
– ldr r0, [r1,r2]
• Load data from location r1+r2 into r0.
– ldr r0, =string
• Load data from label string into r0.
• Special cases exist, see ARM manual
– Example: ldrb loads a single byte, padded with
zeros.
Constants or Immediates
• Operands can contain registers, or immediate
values.
– An immediate is like a constant
– Represent immediates as follows:
• #20
• add r0, r1, #20 – adds 20 to the value of r1 and stores it
in r0.
Arithmetic Instructions
• Addition
– add, adc, adds, etc
• Subtraction
– sub, sbc, rsb, subs, etc
• Multiply
– mul, mla, etc
Move Instruction
• mov <destination>, <operand>
– mov r0, r1 – copy the contents of r1 into r0.
– mov r0, #20 – copy an immediate value of 20 into
r0.
• mvn <destination>, <operand>
– Move negative, negates operand before copying
it.
Compare Instructions
• cmp <operand1>, <operand2>
• cmn <operand1>, <operand2>
• Don’t change the operands, update special
status register flags.
• cmp – subtracts operand2 from operand1 and
discards the result.
• cmn – adds operand2 to operand1 and
discards the result.
Status Register Flags
• Compare instructions and the special “S”
versions of instructions (adds, subs, movs) set
the status register flags.
• Can be used with conditional suffixes to make
conditionally executed instructions.
Conditional Execution
• Just as the special “S” suffix can be added to
set status flags, other suffixes can be added to
act on status flags.
EQ: Equal Z=1
• Using the EQ suffix on an instruction will cause
it to only be executed if the zero flag is set.
cmp r0, r1 @ Set flags based on r0-r1
adds r0, r1, r2 @ Set flags based on r0 = r1 + r2
movs r0, r1 @ Set flags based on r0 = r1
EQ: Equal Z=1
• Using the EQ suffix on an instruction will cause
it to only be executed if the zero flag is set.
Example
cmp r0, r1 @ Set flags based on r0-r1
addeq r2, r0, r1 @ Conditional addition
NE: Equal Z=0
• Using the NE suffix on an instruction will cause
it to only be executed if the zero flag is not set.
Other conditional suffixes
•
•
•
•
•
•
•
•
VS – overflow set, V=1
VC – overflow clear, V=0
MI – minus set, N=1
PL – minus clear, N=0
CS – carry set, C=1
CC – carry clear, C=0
AL – always, unconditional
NV – never, unconditional
Multiple Conditional Suffixes
• HI – higher (unsigned), C=1 and Z=0
– Unsigned greater than
• LS – lower (unsigned), C=0 and Z=1
– Unsigned less than
• GE – greater or equal (signed), N=1, V=1 OR
N=0, V=0
– Signed greater than or equal to
• LT – less than (signed), N=1, V=0, OR N=0,V=1
– Signed less than
Multiple Conditional Suffixes
• GT – greater than (signed), N=1, V=1, OR N=0,
V=0 AND Z=0
– Signed greater than
• LE – less than or equal (signed), N=1, V=0, OR
N=0, V=1, OR Z=1
– Signed less than or equal to
LAB 1 GDB DEMO
WRAP UP
For next time
• Read Chapter 2, Sections 2.6 – 2.8
• Learn about control, branch,
loops, etc.