ECE 291-Lecture 0

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Transcript ECE 291-Lecture 0

Lecture 5
Multiplication, Division and Branches
Dr. Dimitrios S. Nikolopoulos
CSL/UIUC
Outline
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Where are we
Multiplication
Division
Comparison
Jump instructions
By now you should be able to…
• Move data between registers and memory
• Address memory in 17 ways
• Use logic and shifting operations to
– Apply bit masks
– Multiple with sums of powers of two
– Divide by powers of two
• Use addition and subtraction with both signed and
unsigned numbers
• Organize simple programs
Unsigned Multiplication
• MUL X, where X can be register or memory location
• Poor choice of the architects because they ran out of
opcodes…
• Second argument is implicit, it is stored in
– AL if X is 8-bit number
– AX if X is 16-bit number
– EAX if X is 32-bit number
• Result stored in
– AX if arguments are 8-bit
– DX:AX if arguments are 16-bit
– EDX:EAX if arguments are 32-bit
The mess with flags
• The values of A,S,Z,P are undefined after
multiplication
• This means that you cannot check the Z flag to see if
the result is 0!
• You have to compare the result with the value 0 using
a CMP instruction
• The C and O flags are cleared if the result fits in a
half-size register
Signed Multiplication
• The architects tried to apologize for the
inconvenience in 80286 and later processors
• 2’s complement signed integers
• IMUL reg/mem
• IMUL reg, reg/mem
• IMUL reg, immediate
• IMUL reg, reg/mem, immediate data
Signed Multiplication
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IMUL X behaves like MUL
IMUL A, B computes A=A*B
IMUL A,B,C computes A=B*C
There is no 8-bit by 8-bit multiplication, last operand
may be 8-bit
• The instruction does not produce a 2n bit result
so 16-bit by 16-bit produces as 16-bit number
• When the result does not fit in half-sized register the
instruction sets the C and O flags
• What a mess…
Simple Examples
• IMUL BL ; AX=AL*BL, single operand like MUL
• IMUL BX ; DX:AX=BX*AX, single operand like MUL
• IMUL CX,DX,12h ; CX=DX*12h, result in 16-bit CX
Use of MUL/IMUL
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Accessing multidimensional arrays
Let A a NxM array of words with row-major ordering
A[I,J] is accessed as A+(I*M+J)*2
Let a NxMxO array of words with row-major ordering
A[I,J,K] is accessed as A+((I*M+J)*O+K)*2
It is convenient but it is slow
Unsigned division
• DIV X, X register or memory
• Nominator is implicit, stored in AX if X 8-bit, DX:AX if
X is 16-bit, EDX:EAX is X is 32-bit
• If X 8-bit quotient is stored in AL and remainder in AH
• If X 16-bit quotient is stored in AX and remainder in
DX
• If X 32-bit quotient in stored in EAX and remainder in
EDX
Dividing equally sized words
• Use sign-extension of the nominator
• Special instructions for sign extensions
• CBW (Convert Byte to Word)
– Before: AX=xxxx xxxx snnn nnnn
– After: AX=ssss ssss snnn nnnn
• CWD (Convert Word to Double Word)
– Before AX=snnn nnnn nnnn nnnn
– After DX=ssss ssss ssss ssss AX=snnn nnnn nnnn nnnn
• CWDE
– Similar to CWD but sign extends in EAX instead of DX
Flags
• Division just scrambles the flags
• Division by 0 though produces an interrupt by the
microprocessor (more on interrupts next week)
• If the quotient does not fit in the register, this also
produces an interrupt
• E.g. 1000/2=500, argument (2) is 8-bit but quotient
(500) does not fit in AL, there is a divide overflow and
an interrupt is produced
Rounding
• We get rid of the remainder when we want to
truncate the result
• We can double the remainder, compare it to the
denominator and then adjust the quotient
– If (remainder*2) > denominator, increment quotient
Unconditional Jumps
• Transfer the control flow of the program to a specified
instruction, other than the next instruction in
sequential execution
• Jumps are performed with labels pointing to the
address of the target instruction
• It is the equivalent of a goto statement
• Goto is good in assembly!
Unconditional jumps
• Short jump
– JMP SHORT label, where label is within –128/+127 bytes off
the current instruction
• Near jump
– JMP label, where label is within –32,768/+32,767 bytes off
the current instruction
• Far jump
– JMP label, where label is any memory address, in
segment:offset format
• In protected mode near and far jumps are the same
Conditional Jumps
• Jumps performed if a condition evaluates to true
• Conditions are evaluated based on the values of the
bits in the FLAGS register
• Test S, Z, P, C, O
• If condition is true the jump is performed to the
location specified
• If condition is false the code proceeds with the next
instruction in sequence
• Short or near jumps in 80386
Comparisons
• CMP A, B
• Executes A-B without modifying A (non-destructive)
• CMP is most of the time followed by a conditional
jump based on the outcome of the comparison
CMP AL, 10h
JAE target
; If AL >= 10 jump
• CMP is a non-destructive SUB, it sets the flags
exactly like the SUB instruction
Comparisons
• Unsigned A,B
– If (A<B), C=1
– If (A>B), C=0
– Z tested for equality/inequality
• Signed A,B
– If (S XOR O = = 1) A<B else A>B
– Z tested for equality/inequality
Signed comparisons
• Case 1, Sign=1, Overflow=0
– A-B looks negative
– There is no overflow, so A<B
• Case 2, Sign=0, Overflow=1
– A-B looks positive
– But there is overflow so the sign bit is wrong and A<B
• Case 3, Sign=0, Overflow=0
– A-B looks positive
– No overflow, so A>B
• Case 4, Sign=1, Overflow=1
– A-B looks negative
– But overflow bit is set so the sign flag is wrong therefore A>B
Conditional Jumps
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Syntax: JX, where X denotes the condition
J -> Jump
N -> Not
E -> Equal
A/B -> Above/Below for unsigned arithmetic
G/L -> Greater/Less for signed arithmetic
Conditional jump instructions
• JL, jump if less
– Jumps if A<B, that is if S XOR O = 1
• JA, JNBE (above == not (below or equal))
– Jumps if C=0&Z=0
• JBE, JNA (below or equal == not above)
– Jumps if Z=1 | C=1
• JAE, JNB, JNC (above or equal == not below==no
carry)
– C=0
Conditional jump instructions
• JB, JNA, JC (below == not above == carry set)
– C=1
• JE, JZ (equal == result is 0)
– Z=1
• JNE, JNZ (not equal == result is not 0)
– Z=0
• JNS (sign, no sign)
– S=0
• JO
– O=1
• JS
– S=1
Conditional jump instructions
• JNO
– O=0
• JG, JNLE (greater==not (less or equal))
– S=0, Z=0
• JGE, JNL (greater or equal == not less)
– S=0
• JL, JNGE (less == not (greater or equal))
– S XOR O = 1
• JLE, JNG (less or equal == not greater)
– (S XOR O = 1) | Z=1
• JCXZ (counter register is 0), useful for loops
Loops
• LOOP label
– Combination of CMP and JNZ
• Decrement the CX register and if register has not
become 0 jump to the specified label
• If CX becomes 0 the instruction following the LOOP
instruction is executed
Example
ADDS
mov cx, 100
mov
si, BLOCK1
mov
di, BLOCK2
;load count
lodsw
;get Block1 data
; AX = [SI]; SI = SI + 2
.Again
add
AX, [ES:DI]
stosw
loop
ret
;add Block2 data
;store in Block2
; [DI] = AX; DI = DI + 2
.Again
;repeat 100 times
If then else in assembly
mov ax, [a]
mov bx, [b]
cmp ax,bx
ja .true
; false instructions
jmp .done
.true
; true instructions
If (a>b) {
/* true instructions
*/
} else {
/* false instructions
*/
}
Switch in assembly
cmp al, ‘a’
jne .b
; these are the ‘a’
instructions
jmp .done
.b
cmp al, ‘b’
jne .default
; these are the ‘b’
instructions
.default
;default instructions
.done
switch (var) {
case ‘a’:
/* a instructions */
break;
case ‘b’:
/* b instructions */
break;
default
/* default
instructions */
}
Do while in assembly
.begin
; instructions…
mov ax, [a]
mov bx, [b]
cmp a,b
je .begin
do {
/* instructions */
} while (a==b);
While do in assembly
.begin
mov ax, [a]
mov bx, [b]
cmp ax,bx
jne .done
; instructions
jmp begin
.done
while (a==b) {
/* instructions */
};
For loop
mov cx, 10
.begin
; instructions
loop .begin
for (i=10;i>0;i--) {
/* instructions */
}
Examples
;
if
(J <= K) then
;
L := L + 1
;
else L := L - 1
;
J, K, L are signed words
mov
cmp
jnel
inc
jmp
.DoElse:
dec
.ifDone:
ax, [J]
ax, [K]
.DoElse
word [L]
.ifDone
word [L]
;
;
;
;
;
while (J >=
J := J
K := K
L := J
end;
.WhlLoop:
mov
cmp
jnge
dec
inc
mov
imul
mov
jmp
.QuitLoop:
K) do
- 1;
+ 1;
* K;
begin
ax, [J]
ax, [K]
.QuitLoop
word [J]
word [K]
ax, [J]
[K]
[L], ax
.WhlLoop
Now you’re able to…
• Finish HW1
• Do all the math and logic needed for MP1
• Only thing missing for MP1 is stacks, they will be
covered in Lecture 6