Transcript Instructions From the Bottom Up

Instructions From the Bottom Up
Based in part on material from
Chapters 4 & 5 in Computer
Architecture by Nicholas Carter
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Code from the bottom up
• When one examines a problem starting with
the smallest constituent pieces and starts
putting them together, then one is said to be
taking a “bottom up” approach.
• Let us consider programming on a computer
that has the simple architecture shown on
the next slide from the bottom up.
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Bus
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
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Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
3
Lots of registers
• After Memory, Control and the ALU, most of the
other items in this architecture are registers.
– Recall counter is a register that can increment
• Registers are small units of memory that are
associated with the processor.
• The registers serve various special purposes.
• In some cases, main memory could be used in
place of a particular register, but using the register
speeds up the processor.
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Speeding up the process
• Registers are faster than main memory because
writing to or reading from a block of memory is
(at least) a two-step process
– Specify the address
– Read or write a value at that address
• A register is a single unit of memory and thus
eliminates the first step.
• (There is also a vicinity consideration, the
registers are on the processor chip, the memory is
on a separate chip or chips.)
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Incidental remark on memory speed
• There are two basic types of random access
memory (RAM)
– Static RAM (SRAM) – does not require refreshing to
hold its value and is fast but expensive
– Dynamic RAM (DRAM) – does require refreshing to
hold its value and is slow but cheap
• Special blocks of SRAM (cache) can be used to
speed up the processor’s interaction with memory.
In addition, some cache is right on the
microprocessor chip.
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Register size
• The size of the registers (the number of bits, binary
digits, it has) is an important feature of a processor.
• A register may hold
– Data: thus its size may affect the range and/or precision
of numbers available.
– Address: thus its size may affect the number of
addressable locations.
– Instruction: thus its size may affect the number of
instructions one can have.
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Intel family chip comparison table
from howstuffworks.com
It’s been at 32 bits for awhile so one doesn’t hear a lot
about it, but 64 is already here for high-end processors.
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Register hiding
• Registers play a role in programming at the
assembly level, but their use is hidden when
one programs with high-level languages.
– (C allows for some low-level programming.)
• This is an example of those familiar ideas
– Layering
– Information hiding
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Bus
(Architecture reminder)
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
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Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
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Controlling a register
• One enters a value into a register (i.e. loads
it)
– If the load control input is active
– When the clock is at the appropriate part of its
cycle (e.g. positive edge)
• If a register is allowed to place its value on
the bus, it will have an enable control input.
It will do so
– When the enable control input is active
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Other control inputs
• The other components in the architecture
also have control pins that determine
whether the component is active and what
specific action it might be performing.
• These control inputs are connected to the
control unit which determines at each
instance what components are active.
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Micro-coding Load Accumulator A
• To discuss coding from the bottom up, one starts
with micro-code.
• Micro-code is “burned” into the read-only
memory (ROM) of the control unit and is sent out
to the control inputs of the other components.
• Let us examine the micro-code of the assemble
level instruction Load Acc. A
– Assume control inputs are active when they are high
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Bus
(Architecture reminder)
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
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Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
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Control
pins 
Address State: the value of the program counter (which recall is
the address of line of the program to be performed) is put into
memory address register.
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Increment State: the program counter is incremented, getting it
ready for the next time.
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Memory State: the current line of the program is put into
instruction register (so Control knows what to do).
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Recall the instruction consisted of a load command and an
address. A copy of the address is now taken over to the memory
address register.
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The value at that address is loaded into Accumulator A.
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For the load command, there is no activity during the sixth step. It
is known as a "no operation" step (a "no op" or "nop").
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• These 1’s and 0’s are MICRO-CODE.
• It is fed directly to the hardware (specifically the control pins
of the devices).
• Unless you are a hardware manufacturer, you usually don’t
program at this level known as microprogramming.
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ROM, PROM, EPROM, EEPROM
• ROM: Read Only Memory (written by
manufacturer)
• PROM: Programmable Read Only Memory
(written by user, write once)
• EPROM: Erasable Programmable Read Only
Memory (user can erase, take out of computer and
apply ultraviolet light)
• EEPROM: Electrically Erasable Programmable
Read Only Memory (user can erase with out
removing from computer)
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Moving up one level
• Micro-code rarely changes thus it is written in
(“burned into”) read-only memory (ROM).
• By the true meaning of the terms, ROM is RAM, by
which I mean that a particular “word” in ROM is
accessed using an address and does not require
progressing through previous locations.
• Thus we can access the micro-code by supplying its
address. Effectively, the addresses of the microcode is the next level of programming: machine
code.
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Machine code
• In a machine-code program, one tells the computer
to execute the micro-code found at Control-ROM
Address1, then execute the micro-code found at
Control-ROM Address2, etc.
• The program looks something like
– Address1
– Address2
except that the addresses are in binary (1’s and 0’s).
So it might look like
– 00101001
– 00011010
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Machine code is software
• Micro-code is often referred to as firmware
to indicate that it is the transition between
hardware and software, that it is written in
ROM and not changed very readily.
• Machine code is placed in RAM, which is
easily rewritten. Thus it is soft.
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Ground floor for software
• Machine code is the lowest level of
software.
• It is the only level of software capable of
communicating with the hardware (via the
firmware).
• Thus all software must be put into machine
language form before it can be executed.
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What makes software soft?
• Part of the flexibility of software is that the set of
instructions can be rearranged, leading to a
different program.
• Another part of the flexibility is the inclusion of
data with the instructions.
– A machine level instruction may be to move the value
stored at a certain memory location to a register (e.g.
Accumulator A).
– Part of the instruction is data, the memory location,
which can be changed to yield different results.
– Also the data at the memory location can be changed to
yield different results.
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Operator/Operand
• So a software instruction can specify an action and
data to be acted upon.
– We use the term operator (also op-code) to refer to the
action.
– We use the term operand to refer to the data.
• So if we instruct the computer to copy the value
from memory location 35 to accumulator A, then
– Copying a value from memory to Acc. A is the operator
– Location 35 is the operand
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Instruction set
• So a programmer can modify the order of
instructions and the data portion (operands)
of those instructions, but what is fixed is the
set of allowable instructions, known as the
instruction set.
• The instruction set is an important
characteristic of the processor, what
instructions and how many are allowed.
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Instruction Set Size Issue
• Often one can realize a complicated instruction by using
simple instructions, but then one must execute several
instructions instead of just one.
– The burden is taken off the hardware and put on the
software.
• So an issue in processor design is whether one should have
a smaller collection of simpler, faster instructions or
whether one should support a larger collection of more
complex instructions.
• If the more complex instructions are rarely used, it may be
better to leave them out provided their effect can obtained
using a combination of other instructions.
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RISC/CISC
• Reduced Instruction Set Computers (RISC) use
processors that limit the number of instructions
with the idea that the supported instructions will
be simpler and faster.
– A simpler instruction set also means less circuitry,
fewer transistors and thus cheaper processors.
• To distinguish conventional designed from RISC
machines, the term Complex Instruction Set
Computers (CISC) was introduced.
• Ideas from both camps have merged, so now it is
hard to distinguish RISC from CISC.
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RISCs in Parallel
• RISC processors are coming around again
but this time in parallel.
• The simpler RISC processor requires fewer
transistors and takes up less space. Thus
one can place two or more of them on a
single chip.
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Stored program as data
• At the machine language level, one is writing
software by entering strings of 1’s and 0’s. This is
tedious and error prone.
• In the stored program concept, the instructions
and the data are placed together in memory.
• It is then possible to treat the program as data –
either of a different program or indeed of the same
program.
– The latter case is known as self-modifying code.
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Assembly: one small step …
• Instead of coding in machine language’s binary
strings, people introduced mnemonics for the
instructions.
– For example, LDA 35 instead of something like
00101001 00100011.
• Then there was a program that treated the
mnemonic code as data and created from it the
corresponding machine code.
• The program is called an assembler and the
mnemonic code is called assembly.
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One-to-one
• There is essentially a one-to-one
correspondence between assembly code and
machine code. The assembler code
corresponds to a look-up table.
– It looks up the assembly code and outputs the
corresponding machine code.
– It can also do some checking. If the code
submitted is not proper assembly code, …
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Hardware Aware
• The assembly programmer has to have
knowledge of the computer’s architecture
– What registers there are
– What actions are allowed on those registers
– Etc.
• If the hardware changes, the assembly
program may no longer be any good.
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Backward Compatibility
• So as to not render customer’s software completely
useless, processor designers take backward compatibility
into consideration.
• A computer is called “backward compatible” if it can run
the same software as the previous model of the computer.
– The reverse is not necessarily true for software written
based on the new hardware.
• A manufacturer will try to make a series or family of
processors backward compatible provided it doesn’t stand
in the way of progress.
• Sometimes the computer has a special mode for running
old programs.
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Intel
• Intel introduced the first microprocessor (the CPU
on a single chip) – the 4004 designed in
conjunction with the Japanese firm Busicom for
use in a calculator.
• They followed this with the 4040, 8008, 8080,
8086, 8088, and the 80286.
• At this stage, people drop the 80 at the beginning,
giving the 286, 386, 486.
• Because a company cannot trademark a number,
they stopped using this naming scheme, so instead
of 586, we got the Pentium.
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Intel
• Intel, founded in 1968 by Bob Noyce and Gordon
Moore is the world's largest manufacturer of
computer chips.
• Recently it has been challenged by AMD
(Advanced Micro Devices) and Cyrix (now part of
VIA).
• Nearly all PCs are based on Intel's x86
architecture, in fact that’s how some people define
the term PC.
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Speaking of Gordon Moore
• Moore observed an exponential growth
(effectively doubling every couple years) in
the number of transistors per integrated
circuit and predicted that this trend would
continue.
• This is known as Moore’s Law.
• There are similar predictions about memory,
price, etc.
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Year of
introduction
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Transistors
4004
1971
2,250
8008
1972
2,500
8080
1974
5,000
8086
1978
29,000
286
1982
120,000
386™ processor
1985
275,000
486™ DX processor
1989
1,180,000
Pentium®
processor
1993
3,100,000
Pentium II
processor
1997
7,500,000
Pentium III
processor
1999
24,000,000
Pentium 4
processor
2000
42,000,000
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Portability
• Instead of insisting on hardware’s backward
compatibility, one can try to make software
portable.
• In describing software, portable means that the
software can be run on a variety of computers.
Another term used is independence, in this case
machine or hardware independence. Assembly’s
use of specifics of the registers makes it machine
dependent.
• One has to program at a higher level to gain
machine independence.
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High-level language
• Languages which are above assembly language,
known as high-level languages, hide the details of
the hardware and thus are portable or hardware
independent.
• Of course, high-level language are not directly
executed. There is an in-between process or
processes (compiling, translating, interpreting,
linking, etc.) necessary before they can be
executed.
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Generations
• Another way of discussing this is to talk about
generations.
• 1GL or first-generation language is machine
language.
• 2GL or second-generation language is assembly.
• 3GL or third-generation language is a "high-level"
programming language, Fortran, C, Java, Visual
Basic, etc.
• 4GL or fourth-generation language is a more
descriptive language, closer to human language
usually used to query databases.
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Instruction Set
• One aspect of processor design is to
determine what instructions will be
supported.
• There must be rules (syntax) for how
instructions are expressed so that the code
can be parsed, one instruction distinguished
from the next, the data (operand) separated
from the action (operator).
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Number of operands
• An example of syntax would be whether an
operator is binary or unary
• Binary operators take two operands
– e.g. the boolean operator AND
– (x<y) AND (i=j)
• Unary operator take one operand
– E.g. the boolean operator NOT
– NOT(x<y)
• Some ops are context dependent
– - 5 (unary) versus 4-5 (binary)
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Operation versus Instruction
• An operation such as addition, which is
binary (takes two operands), can be coded
using instructions that are unary (one
operand) if there is a default location implied
such as Accumulator A.
• 5 + 6 becomes
– Load 5 (places data in acc. A)
– Add 6 (adds number in Acc. A to new number)
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Where does the answer go?
• Whether it’s 5 + 6 or (Load 5, Add 6),
there’s the question of what to do with the
result.
• We can again use the default location of
Accumulator A to place the answer in or we
can include a third operand that indicates
where the result should be placed.
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Store
• Placing the result of an operation in memory is
known as storing it. Thus with unary instructions,
we would have
– Load 5
– Add 6
– Store 7
• The operand of the store is an address indicating
where to store the answer, which is held in
Accumulator A.
• Or one might have just one instruction with three
operands
– Add 7, 5, 6
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Addressing Modes
• The “7” in the previous example was clearly
an address. But this raises the question as to
what were the operands in the two previous
instructions (Load and Add).
• For those instructions, the operand might
have been the actual numbers one wanted
added or the addresses of numbers one
wanted added.
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More than one kind of add
• By Add one typically means the latter case
on the previous slide. The operand is not
the number to be added but the address of
the number to be added.
• A designer can include a distinct add
instruction, Add Immediate, in which the
operand is the actual number to be added.
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Add Indirect
• In another version of addition, the operand
is an address, and the data at that address is
also an address, and the actual number to be
added is located at the second address.
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A short program
Address
Value
0
LOAD 4
1
ADD INDIRECT 5
2
ADD IMMEDIATE 6
3
STOP
4
5
5
6
6
7
7
8
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Acc. A: XXX
The arrow indicates the
program counter, we
assume it has not
executed the statement it
points to.
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A short program
Address
Value
0
LOAD 4
1
ADD INDIRECT 5
2
ADD IMMEDIATE 6
3
STOP
4
5
5
6
6
7
7
8
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Acc. A: 5
The Load 4 instruction
has been executed.
The value at location 4
(which is a 5) has
been loaded into the
accumulator.
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A short program
Address
Value
0
LOAD 4
1
ADD INDIRECT 5
2
ADD IMMEDIATE 6
3
STOP
4
5
5
6
6
7
7
8
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Acc. A: 12
The Add Indirect 5 instruction
has been executed. One goes
to location 5 to find a value of
6. That 6 is an address, thus
one goes to location 6 to find a
value of 7 and that is added to
the 5 waiting in the
accumulator. The result of 12
is placed in the accumulator.
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A short program
Address
Value
0
LOAD 4
1
ADD INDIRECT 5
2
ADD IMMEDIATE 6
3
STOP
4
5
5
6
6
7
7
8
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Acc. A: 18
The Add Immediate 6
instruction has been
executed. The value 6 is
data which is added to the
12 waiting in the
accumulator. The result of
18 is placed in the
accumulator.
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The Stop Instruction
• Recall that in what is actually executed (machine
code) the instructions themselves are numbers.
• Thus it is crucial to know within a single
instruction which numbers correspond to an
operation and which numbers are operands.
• Similarly on the level of the program itself, the
processor needs to know where the program ends
as there may be data stored after it.
• In a machine with an operating system, it is more
a notion of returning (control) than of stopping or
halting.
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Recap so far
• So there were issues about the number of
operands.
– Recall that we have a fetch-execute cycle – first an
instruction is retrieved from memory and then acted
upon.
– With unary instructions adding two numbers and
storing the result required three instructions, that’s three
fetches and three executions.
– With ternary instructions it can be done with one
instruction, one fetch and one execute. The execution is
now more complicated but we have saved time on
fetches.
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Recap so far (Cont.)
• More operators means more complicated
circuitry, the load and store aspects of the
instruction would have to built into each
separate instruction.
• There is a speed versus complexity issue.
And complexity also brings the issue of cost
along with it.
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Recap so far (Cont.)
• After determining the number of operands, came
the issue of what the operands mean.
– Are they data, addresses of data, or addresses of
addresses of data?
• Either we can decide to support all of these and
choose complexity. Or we can choose to support
only some of them and sacrifice efficiency.
– You can eliminate Add Immediate if you always store
the values you want to add.
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Data Types
• Apart from addressing, another issue is the type of
data the operation is acting on.
– The process for adding integers is different from the
process for adding floating point numbers.
– So one may have separate ADD and FADD for the
addition of integers and floats respectively.
– Furthermore, one may need to add instructions to
convert from one type to another.
• To add an integer to a float, convert the integer to a float and
then add the floats.
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References
• Computer Architecture, Nicholas Carter
• Digital Computer Electronics, Albert P.
Malvino and Jerald A. Brown
• http://www.webopedia.com
• http://www.intel.com
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