Transcript Instructions from the Bottom Up

Instructions at the Lowest Level
Some of this material can be found in
Chapter 3 of Computer Architecture
(Carter)
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Bus
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
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Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
3
Micro-code
• Let us now examine the steps involved in
the assembly (machine language)
instruction Load Accumulator A.
– Recall that the Accumulator is a register
associated with the ALU. If you want to do
something as simple as adding two numbers
you start by pitting the first number in the
Accumulator.
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What do you mean by Load?
• There are different types of Loads
– Load
• Instruction and address
• Data at specified address to be put in Acc. A
– Load immediate
• Instruction and data
• Data in instruction sent directly to Acc. A
– Load indirect
• Instruction and address of address
• The data in the location indicated by the instruction holds
another address, and that address has the data to be placed in
Acc. A
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Addressing modes
• These variations on instructions are known
as addressing modes.
• For now we will consider the Load – as
opposed to Load Immediate or Load
Indirect
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Fetch Cycle
• Address State: the value of the program counter
(which recall is the address of line of the program
to be performed) is put into memory address
register.
• Increment State: the program counter is
incremented, getting it ready for the next time.
• Memory State: the current line of the program is
put into instruction register (so Control knows
what to do).
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Execution cycle (Load Acc. A)
• The remaining steps depend on the specific
instruction and are collectively known as the
execution cycle.
– Recall the instruction consisted of a load command and
an address. A copy of the address is now taken from
the instruction register over to the memory address
register.
– The value at that address is loaded into Acc. A.
– For the load command, there is no activity during the
sixth step. It is known as a "no operation" step (a "no
op" or "nop").
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Data Movement
• Many of the micro-code steps involve
moving data and addresses to various
locations (registers, memory locations, etc.)
• The information is often, but not always,
sent over the bus.
• So information must be put on and taken
from the bus.
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Controlling a register
• One enters a value into a register (i.e. loads
it)
– If the load control input is active
– When the clock is at the appropriate part of its
cycle (e.g. positive edge)
• If a register is allowed to place its value on
the bus, it will have an enable control input.
It will do so
– When the enable control input is active
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The clock pin
• The clock is another control pin (sometimes
called a timing pin) which determines when
a register takes the value on the bus.
• The load input determines if the register
takes the value.
• The clock input determines when the
register takes the value.
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The clock
• A binary clock: 10101010101010101010
• Each cycle (01) should take the same amount of
time (the time for a cycle: the period)
• The number of cycles in a second is called the
frequency.
• “On the edge:” many registers load on the clock’s
edge
– Positive edge: as 0 goes to 1
– Negative edge: as 1 goes to 0
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Other control pins
• Items involved in data manipulation (as
opposed to simply data movement) will
require additional control pins.
– For example, the program counter needs to be
incremented.
• Thus additional control pins are required
– These pins are sometimes also referred to as
“enable” pins, as they enable a particular action
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ALU control
• The primary data manipulator is the ALU.
• The control pins here select between
various logic and arithmetic operations –
Add, Subtract, Multiply, AND, OR, etc.
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Micro-code is
• Micro-code is 1’s and 0’s stored in ROM
• The ROM output is connected to control
pins.
• For example, one micro-code instruction is
to take the value from the program counter
to the memory address register
– So send active signals to “enable the PC” and
“load the MAR”
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Micro-coding Load Accumulator A
• To discuss coding from the bottom up, one starts
with micro-code.
• Micro-code is “burned” into the read-only
memory (ROM) of the control unit and is sent out
to the control inputs of the other components.
• Let us examine the micro-code of the assemble
level instruction Load Acc. A
– Assume control inputs are active when they are high
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Bus
(Architecture reminder)
Keyboard
encoder
Input port 1
Input port 2
Prog. counter
Mem.Add.Reg.
Memory
MDR
Instr. Reg.
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Control
Accumulator
ALU
Flags
TMP
B
C
Output port 3
Display
Output port 4
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Control
pins 
Assume here that 1 is active and 0 is inactive – “active high”
Address State: the value of the program counter (which recall is
the address of line of the program to be performed) is put into
memory address register.
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Increment State: the program counter is incremented, getting it
ready for the next time.
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Memory State: the current line of the program is put into
instruction register (so Control knows what to do).
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Recall the instruction consisted of a load command and an
address. A copy of the address is now taken over to the memory
address register.
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The value at that address is loaded into Accumulator A.
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For the load command, there is no activity during the sixth step. It
is known as a "no operation" step (a "no op" or "nop").
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• These 1’s and 0’s are MICRO-CODE.
•(Don’t confuse micro-code with macro-code.)
• It is fed directly to the hardware (specifically the control pins of the
devices).
• Unless you are a hardware manufacturer, you usually don’t program at
this level known as microprogramming.
•You might copy someone else’s code when you flash the BIOS.
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ROM for other addressing
modes?
• What would the ROM look like for the
other versions of Load?
– Load Immediate?
– Load Indirect?
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Data to
Accumulator
No-op
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Accumulator Load
Accumulator Enable
Instruction Register Load
Instruction Register Enable
Memory Data Register Load
Memory Data Register Enable
Memory Write
Memory Read
Memory Address Register Load
Program Counter Increment
Program Counter Load
Program Counter Enable
Load Immediate
Address state
1
0
0
1
0
0
0
0
0
0
0
0
Increment state
0
0
1
0
0
0
0
0
0
0
0
0
Memory State
0
0
0
0
1
0
1
0
0
1
0
0
1
No-op
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Instr. Address
to MAR
Data to MAR
Data to
Accumulator
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1
1
1
1
1
1
Accumulator Load
Accumulator Enable
Instruction Register Load
Instruction Register Enable
Memory Data Register Load
Memory Data Register Enable
Memory Write
Memory Read
Memory Address Register Load
Program Counter Increment
Program Counter Load
Program Counter Enable
Load Indirect
Address state
1
0
0
1
0
0
0
0
0
0
0
0
Increment state
Memory State
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
1
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The “von Neumann bottleneck"
• Our basic approach is to
– get the instruction from memory (fetch)
– Get the data from memory or put data in
memory, etc. (execute)
• We go back and forth between the
memory and CPU, one instruction at a
time. This is sometimes called the
“von Neumann bottleneck.”
• Ideas like caching and pipelining
attempt to speed the process up but
they don’t vary from the overall
approach.
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Lots of registers
• After Memory, Control and the ALU, most of the
other items in this architecture are registers.
– A counter is a register that can increment
• Registers are small units of memory that are
associated with the processor.
• The registers serve various special purposes.
• In some cases, main memory could be used in
place of a particular register, but using the register
speeds up the processor.
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Speeding up the process
• Registers are faster than main memory because
writing to or reading from a block of memory is
(at least) a two-step process
– Specify the address
– Read or write a value at that address
• A register is a single unit of memory and thus
eliminates the first step.
• (There is also a vicinity consideration, the
registers are on the processor chip, the memory is
on a separate chip or chips.)
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Register size
• The size of the registers (the number of bits, binary
digits, it has) is an important feature of a processor.
• A register may hold
– Data: thus its size may affect the range and/or precision
of numbers available.
– Address: thus its size may affect the number of
addressable locations.
– Instruction: thus its size may affect the number of
instructions one can have.
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Intel family chip comparison table
from howstuffworks.com
It was at 32 bits for a long time, but 64 is finally here.
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32-memory limitation
•
•
•
•
•
•
With 32 bits one can address 2^32 things.
In memory one addresses bytes
2^32= 4,294,967,296 bytes
4,294,967,296 bytes = 4194304 kilobytes
4194304 kilobytes = 4096 megabytes
4096 meagbytes = 4 gigabytes
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Register hiding
• Registers play a role in programming at the
assembly level, but their use is hidden when
one programs with high-level languages.
– (The programming language C allows for some
low-level programming.)
• This is an example of those familiar ideas
– Layering
– Information hiding
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Software
Based in part on material from
Chapters 4 & 5 in Computer
Architecture by Nicholas Carter
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Moving up one level
• Micro-code rarely changes thus it is written in
(“burned into”) read-only memory (ROM).
• By the true meaning of the terms, ROM is RAM,
by which I mean that a particular “word” in ROM
is accessed using an address and does not require
progressing through previous locations.
• Thus we can access the micro-code by supplying its
address. Effectively, the addresses of the microcode is the next level of programming: machine
code.
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Machine code
• In a machine-code program, one tells the computer
to execute the micro-code found at Control-ROM
Address1, then execute the micro-code found at
Control-ROM Address2, etc.
• The program looks something like
– Address1
– Address2
except that the addresses are in binary (1’s and 0’s).
So it might look like
– 00101001
– 00011010
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Machine code is software
• Micro-code is often referred to as
firmware to indicate that it is the transition
between hardware and software, that it is
written in ROM and not changed very
readily.
• Machine code is placed in RAM, which is
easily rewritten. Thus it is soft-ware.
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Ground floor for software
• Machine code is the lowest level of
software.
• It is the only level of software capable of
communicating with the hardware (via the
firmware).
• Thus all software must be put into machine
language form before it can be executed.
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What makes software soft?
• Part of the flexibility of software is that the set of
instructions can be rearranged, leading to a
different program.
• Another part of the flexibility is the inclusion of
data with the instructions.
– A machine level instruction may be to move the value
stored at a certain memory location to a register (e.g.
Accumulator A).
– Part of the instruction is data, the memory location,
which can be changed to yield different results.
– Also the data at the memory location can be changed to
yield different results.
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Operator/Operand
• So a software instruction can specify an action and
data to be acted upon.
– We use the term operator (also op-code) to refer to the
action.
– We use the term operand to refer to the data.
• So if we instruct the computer to copy the value
from memory location 35 to accumulator A, then
– Copying a value from memory to Acc. A is the operator
– Location 35 is the operand
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Instruction set
• So a programmer can modify the order of
instructions and the data portion (operands)
of those instructions, but what is fixed is the
set of allowable instructions, known as the
instruction set.
• The instruction set is an important
characteristic of the processor, what
instructions and how many are allowed.
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Instruction-Set Size Issue
• Often one can realize a complicated instruction by using
simple instructions, but then one must execute several
instructions instead of just one.
– The burden is taken off the hardware and put on the
software.
• So an issue in processor design is whether one should have
a smaller collection of simpler, faster instructions or
whether one should support a larger collection of more
complex instructions.
• If the more complex instructions are rarely used, it may be
better to leave them out – provided their effect can
obtained using a combination of other instructions.
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RISC/CISC
• Reduced Instruction Set Computers (RISC) use
processors that limit the number of instructions
with the idea that the supported instructions will
be simpler and faster.
– A simpler instruction set also means less circuitry,
fewer transistors and thus cheaper processors.
• To distinguish conventionally designed from
RISC machines, the term Complex Instruction
Set Computers (CISC) was introduced.
• Ideas from both camps have merged, so now it is
hard to distinguish RISC from CISC.
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RISCs in Parallel
• RISC processors are coming around again
but this time in parallel.
• The simpler RISC processor requires fewer
transistors and takes up less space. Thus,
one can place two or more of them on a
single chip. Multicore.
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Stored program as data
• At the machine language level, one is writing
software by entering strings of 1’s and 0’s. This is
tedious and error prone.
• In the stored program concept, the instructions
and the data are placed together in memory.
• It is then possible to treat the program as data –
either of a different program or indeed of the same
program.
– The latter case is known as self-modifying code.
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Assembly: one small step …
• Instead of coding in machine language’s binary
strings, people introduced mnemonics for the
instructions.
– For example, LDA 35 instead of something like
00101001 00100011.
• Then there was another program that treated the
mnemonic code as data and created from it the
corresponding machine code.
• The program is called an assembler and the
mnemonic code is called assembly.
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One-to-one
• There is essentially a one-to-one
correspondence between assembly code
and machine code. The assembler code
corresponds to a look-up table.
– It looks up the assembly code and outputs the
corresponding machine code.
– It can also do some checking. If the code
submitted is not proper assembly code, …
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Hardware Aware
• The assembly programmer has to have
knowledge of the computer’s architecture
– What registers there are
– What actions are allowed on those registers
– Etc.
• If the hardware changes, the assembly
program may no longer be any good.
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Backward Compatibility
• So as to not render customer’s software completely
useless, processor designers take backward compatibility
into consideration.
• A computer is called “backward compatible” if it can run
the same software as the previous model of the computer.
– The reverse is not necessarily true – for software
written based on the new hardware.
• A manufacturer will try to make a series or family of
processors backward compatible provided it doesn’t stand
in the way of progress.
• Sometimes the computer has a special mode for running
old programs.
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Intel
• Intel introduced the first microprocessor (the
CPU on a single chip) – the 4004 designed in
conjunction with the Japanese firm Busicom for
use in a calculator.
• They followed this with the 4040, 8008, 8080,
8086, 8088, and the 80286.
• At this stage, people drop the 80 at the beginning,
giving the 286, 386, 486.
• Because a company cannot trademark a number,
they stopped using this naming scheme, so instead
of 586, we got the Pentium.
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Intel
• Intel, founded in 1968 by Bob Noyce and Gordon
Moore is the world's largest manufacturer of
computer chips.
• It has been challenged by AMD – Advanced
Micro Devices (especially since they broke the
GHz barrier first) – and Cyrix (now part of VIA).
• Nearly all PCs are based on Intel's x86
architecture, in fact that’s how some people define
the term PC.
• And now Intel chips are used in MACs.
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Speaking of Gordon Moore
• Moore observed an exponential growth
(effectively doubling every couple years) in
the number of transistors per integrated
circuit and predicted that this trend would
continue.
• This is known as Moore’s Law.
• There are similar predictions about
memory, price, etc.
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Year of
introduction
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Transistors
4004
1971
2,250
8008
1972
2,500
8080
1974
5,000
8086
1978
29,000
286
1982
120,000
386™ processor
1985
275,000
486™ DX processor
1989
1,180,000
Pentium®
processor
1993
3,100,000
Pentium II
processor
1997
7,500,000
Pentium III
processor
1999
24,000,000
Pentium 4
processor
2000
42,000,000
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References
• Computer Architecture, Nicholas Carter
• Computer Organization and Design,
David A. Patterson and John L. Hennessey
• Digital Computer Electronics, Albert P.
Malvino and Jerald A. Brown
• http://en.wikipedia.org/wiki/Addressing_mode
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