Transcript Microprocessors I - University of Massachusetts Lowell

16.317
Microprocessor Systems Design I
Instructor: Dr. Michael Geiger
Spring 2013
Lecture 21:
Exam 2 Preview
Lecture outline
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Announcements/reminders
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Lab 2 due 4/5
Exam 2: Wednesday, 3/27
Today’s lecture: Exam 2 Preview
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7/20/2015
Set on condition instructions
Jump instructions
Loop instructions
Subroutines
Protected mode
HLL  assembly
Microprocessors I: Exam 2 Preview
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Exam 2 notes
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Allowed
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One 8.5” x 11” double-sided sheet of notes
Calculator
No other notes or electronic devices (phone,
laptop, etc.)
Exam will last 50 minutes
Covers all lectures after Exam 1 (13-20)
Format similar to previous exam
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7/20/2015
1 multiple choice question
2-3 short problems to solve/code sequences to
evaluate
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Review: set on condition, jump, loop
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SETcc D
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Sets single byte destination to 1 (01H) if condition true; all
0s (00H) if condition false
Can be used to build up complex conditions
Two general types of jump
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Unconditional: JMP <target>
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Conditional: Jcc <target>
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Always go to target address
Go to target address if condition true
Loop instructions
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Combines CX decrement with JNZ test
May add additional required condition
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7/20/2015
LOOPE/LOOPZ: loop if ((CX != 0) && (ZF == 1))
LOOPNE/LOOPNZ: loop if (CX != 0) && (ZF == 0))
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Review: subroutines
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Subroutines: low-level functions
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When called, address of next instruction saved
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Return instruction ends routine; goes to that point
May need to save state on stack
80386 specifics
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CALL <proc>: call procedure
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RET: return from procedure
Saving state to stack: push instructions
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7/20/2015
<proc> can be label (16-/32-bit imm), reg, mem
Store data “above” current TOS; decrement SP
Basic PUSH stores word or double word
Directly storing flags: PUSHF
Storing all 16-/32-bit general purpose registers: PUSHA/PUSHAD
Restoring state: POP/POPF/POPA/POPAD
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Review: protected mode memory accesses
Determine if access is local or global
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Use TI bit in selector
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Segment registers now function as selectors
TI == 0  global access
TI == 1  local access
Find the starting address of the appropriate
descriptor table
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Global access uses GDT
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Local access uses current LDT
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7/20/2015
GDTR holds base/limit of GDT
LDTR cache holds base/limit of LDT
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Review: protected mode memory accesses
Find the right descriptor in GDT/LDT
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Index field in selector chooses entry in GDT/LDT
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Tables are 0 indexed  1st descriptor = descriptor #0
Starting address of descriptor =
(table base) + (index * 8)
Descriptor holds base/limit for segment
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Use the segment base address found in the
descriptor to calculate the physical address
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7/20/2015
Physical address = (segment base) + (EA)
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Review: local descriptor table
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Each task has its own local descriptor table
LDT changes every time you change tasks
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Base/limit of that table changes
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LDTR cache holds LDT base (32 bits) and limit (16 bits)
LDT base/limit for each task is stored in a
descriptor in the GDT
LDTR: selector pointing to GDT entry describing
LDT for current task
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7/20/2015
TI == 0 in LDTR
Index point to descriptor with LDT base/limit for
current task
On task switch, LDTR changed and LDT base/limit
reloaded
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Review: HLL  assembly
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Data accesses
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Global variables  static; allocated in data segment
Other variables  dynamic; allocated on stack
Stack frame for each function contains (from top)
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Conditional statements (if-then-else)
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Saved variables within function
Local variables for function (starting at EBP – 4)
Saved EBP
Saved EIP
Function arguments (starting at EBP + 8)
Evaluate condition (CMP instruction(s))
Conditional jump (often to “else” case)
“If” case ends with unconditional jump to skip “else”
Loops
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Initialize variable at start
Test loop condition (similar to if)
Change loop variable
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Final notes
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Next time: Exam 2
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Allowed calculator, one 8.5” x 11” note sheet
Will be provided list of instructions/condition codes
Please be as close to on time as possible
Reminders:
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7/20/2015
Lab 2 due 4/5
Microprocessors I: Exam 2 Preview
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