Transcript CPU and memory - Wright State University

CEG 320/520
Computer Organization
and
Assembly Language Programming
CEG 320/520: Computer Organization and Assembly Language Programming
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Computer
Organization
&
Assembly Language
Programming
High level code
CPU
Memory
Compiler
I/O
• CPU
Assembly code
– ALU
– Registers
– Control logic
• Memory
– Organization
– Cache
– Virtual Memory
• I/O
– Organization of an I/O device
– Polled, Interrupt driven, DMA
Assembler
Machine code
CPU
We will write
assembly language
code, and assemble
it into machine
code.
We will examine in detail how the CPU
executes that code.
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Computer Organization
Very Brief Introduction
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Intro to Computer Organization: Goals
• General
– Basic types of computer operations
• Instruction cycle
– Fetch-execute-store cycle
• Data Representation
– Binary, hex, 2’s complement
• Memory organization
– Big Endian vs Little Endian
– BYTE, WORD, LONG WORD
– How memory is addressed in the 68000
• Registers
– Defining feature of a Von Neumann machine
– Register size and how bits are numbered in the 68000
• Reading:
– General Computer Organization: HVZ Chapter 1, 7.1, 7.2
– Memory: HVZ Chapter 2.2
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Intro to Computer Organization: Von Neumann
• The Von Neumann model of computer processing
– Stored Program: Program and data are both stored as sequences of bits in
the computer’s memory.
– The program is executed one instruction at a time under the direction of
the control unit.
• The instruction-execution cycle
– Instruction Fetch (IF) stage
• Get next instruction from the memory address in the program counter (PC)
• Place the new instruction in the Instruction Register (IR)
• Increment the PC to the next instruction address
– Execute operation (EX) stage
• Execute the operation specified by the machine instruction in the IR
– Branch instructions may update the PC
– Repeat
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Intro to Computer Organization: Instructions
• Machine-level instructions either move data and/or addresses, or
do simple math or logic operations on data and/or addresses.
– Data and/or addresses can be moved to or from memory, and in and out of
CPU registers.
– Addresses are really just a special type of data.
• There are three basic types of computer instructions
– Arithmetic Instructions: operate on values stored in memory or registers
• Arithmetic, Shift, and Logic instructions
– Move Instructions: move data between memory and registers
• Load/Store instructions
• Move/Copy portions of memory
– Branch Instructions: select one of two possible next instructions to execute
• Branch on condition, Unconditional branch (Jump)
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Intro to Computer Organization: Data Representation
• Binary
– Any unsigned whole number can be represented in base 2
(binary) as a string of 1’s and 0’s.
– A binary number can be thought of as a series of “bits”
(binary digits), each of which can have the value 1 or 0:
• 4-bit example: 01012 = 510
– Range of representation
• N-bit binary numbers represent the range of numbers from 0 … 2n-1
• 4-bit binary numbers represent 0 … +16.
– There are 10 kinds of people in the world:
those who understand binary and those who don’t.
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Intro to Computer Organization: Data Representation
• Hexadecimal
– Easier and more compact for humans to view, write, and
understand.
– There is a one-to one mapping from binary to hexadecimal
(hex), where each 4 bits represents one hexadecimal digit.
• Example: 0101001110112 = 53B16
– For this reason, computer memory and register contents are
usually shown in hex.
• Note: base is generally indicated only when it is not obvious from
context.
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Intro to Computer Organization: Data Representation
• 2’s Complement - Signed number representation
– Positive numbers:
• Sign (leftmost) bit = 0.
• Magnitude: binary representation of number.
– Negative numbers:
• Sign (leftmost) bit = 1.
• Magnitude: complement binary representation to form 1’s
complement, then add 1.
– Range of Representation:
• For n-bit 2’s complement, range of numbers that may be represented is
-2n-1 … 2n-1 – 1.
• 4-bit 2’s complement represents numbers -8 … +7.
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Intro to Computer Organization: Data Representation
• 2’s Complement - Why?
– Only one representation for ‘0’
• Signed magnitude: 00 (positive 0) or 10 (negative 0)
• 1’s complement: 00 (positive 0) or 10 (negative 0)
• 2’s complement: 00
– Arithmetic is simplified
• Addition is performed identically for positive and negative numbers
• Carry generated by adding sign bits can be thrown away
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Intro to Computer Organization: Data Representation
• 2’s Complement – Hexadecimal
– Converting a 2’s complement number to a hexadecimal
representation merely involves breaking up the 2’s
complement representation into 4-bit binary chunks, and
converting those to hexadecimal.
2’s complement:
Hexadecimal:
1100 0010
C
2
0100 1010 1001
8
A
9
– Don’t get fancy! Don’t convert the 2’s complement to
unsigned binary then convert that to hexadecimal! You will
get the wrong value.
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Intro to Computer Organization: Memory
• Most basic operation: getting information from memory to the
CPU and back.
• Conceptually, computer memory is simply a collection of
locations where information can be stored as bits.
• Most often, memory is byte-addressable. This means it is divided
into bytes (8-bit quantities) each identified by a unique address.
• Generally, bytes are addressed sequentially, beginning with
address 0.
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Intro to Computer Organization: Memory
Address
0
1
2
3
…
1004
1005
1006
…
Contents
A5
B7
30
9F
…
80
76
0
…
• Each byte has its own
address.
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Intro to Computer Organization: Memory
• A WORD is the basic unit of information
– Most CPU operations take place using words
– The word-length is the amount of information retrieved in a
single memory access.
• It is usually easiest to think of memory as a collection
of words
•
•
•
•
Pentium – 32-bit words
Motorola 68000 – 16-bit words
68030 – 32-bit words
Dec Alpha – 64-bit words
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Intro to Computer Organization: Memory
Address
0
2
4
6
…
1004
1006
1008
…
Contents
A5 F3
B7 56
00 30
9F 0A
…
11 AA
60 0C
00 00
…
• Note that 16-bit word
addresses are all divisible by
2.
• The word at address n
contains the bytes at
addresses n and n+1.
– Big Endian addressing: left byte
is considered at address n.
(makes sense to look at)
– Little Endian: the opposite is
true. (easy to get the low-order
byte of a word)
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Intro to Computer Organization: Memory
• The Motorola 68000 memory addressing:
– Memory is divided into 16-bit words, each having a unique
even address (0,2,4…).
– Bytes are addressed using the Big Endian scheme.
– A long word is a 32-bit value which can begin at any word
address.
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Intro to Computer Organization: Registers
• Registers are temporary storage locations
– Much faster than memory (10–100×)
– Inside the CPU, gated directly to components
– Special registers: program counter (PC), instruction register (IR), memory
address register (MAR), memory data register (MDR)
• Data is typically transferred to a register before operating on it,
then results are stored back to memory.
• Motorola 68000
– Eight data registers named D0-D7
– Eight address registers named A0-A7
• A7 is a special register - the stack pointer (SP)
– Program Counter (PC)
– Status Register (SR)
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Intro to Computer Organization: Registers
31 30 29 28 27 26 25 … 15 14 13 12 11 10 … 7 6 5 4 3 2 1 0
• Data registers are 32 bits wide.
– Operations on data registers can be performed on BYTE,
WORD, or LONG word values.
• Registers are accessed like Little Endian memory
– WORD operations use only bits 15-0.
– BYTE operations use only bits 7-0.
• Address registers are 32 bits wide.
– Only WORD and LONG word operations can be
performed on address registers.
– The 68000 uses just 24-bits to address memory, but we will
always consider addresses to be LONG words.
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Intro to Computer Organization: You Should Know
• General
– Basic types of computer operations
• Instruction cycle
– Fetch-execute-store cycle
• Data Representation
– Binary, hex, 2’s complement
• Memory organization
– Big Endian vs Little Endian
– BYTE, WORD, LONG WORD
– How memory is addressed in the 68000
• Registers
– Defining feature of a Von Neumann machine
– Register size and how bits are numbered in the 68000
• Reading:
– General Computer Organization: HVZ Chapter 1, 7.1, 7.2
– Memory: HVZ Chapter 2.2
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