Transcript PowerPoint 프레젠테이션 - German University in Cairo

ELECT 707
Micro-Computer Applications:
Addressing Modes
Dr. Eng. Amr T. Abdel-Hamid
Fall 2011
Organization of 8088
Address bus (20 bits)
Micro-Computer Applications
AH
AL
BH
BL
CH
CL
Execution Unit
DH
SP
(EU)
General purpose
register
DL
Segment
register
BP
SI
DI
CS
Data bus
(16 bits)
DS
SS
ALU Data bus
(16 bits)
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ALU
Flag register

ES
IP
Instruction Queue
Bus
control
External bus
EU
control
Bus Interface Unit (BIU)
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Instruction Machine Codes
 Instruction machine codes are binary numbers
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 For Example:
1000100011000011
MOV
MOV AL, BL
Register
mode
 Machine code structure
Opcode
Mode
Operand1 Operand2
 Some instructions do not have operands, or have only one operand
 Opcode tells what operation is to be performed.
EU control logic generates ALU control signals accord
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ing to Opcode)


Mode indicates the type of a instruction: Register type, or Memory type
Operands tell what data should be used in the operation. Operands can
be addresses telling where to get data (or where to store results)
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EU Operation
1. Fetch an instruction from instruction
queue
2. According to the instruction, EU control
logic generates control signals.
(This
process is also referred to as instruction
decoding)
3. Depending on the control signal,
EU performs one of the following
operations:
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




An arithmetic operation
A logic operation
Storing a datum into a register
Moving a datum from a register
Changing flag register
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Registers
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 A register is a storage element inside a m
icroprocessor.
 Almost all operations would involve using
registers.
 Some registers are general purpose regis
ters, while others have special purposes.
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 General purpose registers can hold various da
ta sizes and used for almost any purpose as d
ictated by the program.
 However, each general purpose register does
have its own special purposes.
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Registers
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Registers
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Since the x86 instr
uction set is design
ed to be compatible
with previous micro
processors, the sam
e register can be ac
cessed using differe
nt names.
Different names are
given for 64-bit, 32
-bit, 16-bit and 8-b
it version of the sam
e register.

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General Purpose Registers
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 RAX, EAX, AX (AH & AL)
 A general purpose register
 Also an accumulator – stores intermediate res
ults after arithmetic and logic operations
 Can also hold the offset address of a location
in memory (80386 and above)
 RBX, EBX, BX (BH & BL)
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 A general purpose register
 Also a base index register – holds the offset a
ddress of a location in memory
 Can also address memory data (80386 and a
bove)
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General Purpose Registers
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 RCX, ECX, CX (CH & CL)
 A general purpose register
 Also a count register – holds the count for var
ious instructions
 Can also hold the offset address of a location
in memory (80386 and above)
 RDX, EDX, DX (DH & DL)
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 A general purpose register
 Also a data register – stores data related to a
ccumulator’s calculation (multiply and divide)
 Can also address memory data (80386 and a
bove)
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General Purpose Registers
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 RBP, EBP, BP
 A general purpose register
 Also a base pointer register – points to a me
mory location for memory data transfer
 RDI, EDI, DI
 A general purpose register
 Also a destination index register – holds the
memory address for the destination data of a
string instruction
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General Purpose Registers
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 RSI, ESI, SI
 A general purpose register
 Also a source index register - holds the memo
ry address for the source data of a string instr
uction
 R8 through R15
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 General purpose registers
 Found only in 64-bit microprocessors
 Data are addressed in 64-, 32-, 16-, or 8-bit
sizes
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Special Purpose Registers
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 RIP, EIP, IP
 Instruction pointer – points to the next instru
ction in the memory to be executed
 RSP, ESP, SP
 Stack pointer – points to an area in memory c
alled the stack
 RFLAGS, EFLAGS, FLAGS
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 Indicates the condition of the microprocessor
and control its operation
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Flags
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Flags
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 The C, P, A, Z, S and O flags are changed by mo
st arithmetic and logic operations.
 Flags never change for any data transfer or prog
ram control operations.
 Some flags are also used to control features fou
nd in the microprocessor.
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Flags
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 Descriptions for some of the flag bits:
 C (carry): holds the carry after addition or b
orrow after subtraction.
 P (parity): the count of 1s in a number expr
essed as even or odd.
 0 for odd, 1 for even.
 A (auxiliary carry): holds the half-carry afte
r addition or the borrow after subtraction bet
ween bit positions 3 and 4 of the result.
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Flags
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 Z (zero): shows that the result of an arithmetic or logi
c operation is zero.
 0 result is not zero, 1 result is zero.
 S (sign): holds the arithmetic sign of the result after a
n arithmetic or logic instruction executes.
 0 for positive, 1 for negative.
 T (trap): enables trapping through an on-chip debuggi
ng feature.
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 0 disable trapping, 1 enable trapping.
 If enabled, allows the microprocessor to interrupt the flow
of the program on conditions indicated by the debug regis
ters and control registers.
 Microsoft Visual Studio debugging tool uses this feature.
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Flags
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 I (interrupt): control the operation of the INTR (interrupt
request) input pin.
 0 disables INTR pin, 1 enables INTR pin.
 D (direction): selects increment or decrement mode for
SI/DI registers.
 0 increment, 1 decrement.
 O (overflow): indicates that the result of an addition/sub
traction of signed numbers exceeded the capacity of the
machine.
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Memory Segmentation
 A segment is a 64KB block of memory starting from any
16-byte boundary
 For example: 00000, 00010, 00020, 20000, 8CE90, and E0840 are all val
segment addresses
 The requirement of starting from 16-byte boundary is due to the 4-bit
left shifting
 Segment registers in BIU
15
CS
0
Code Segment
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DS
Data Segment
SS
Stack Segment
ES
Extra Segment
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Generating Memory Addresses
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 How can a 16-bit microprocessor generate 20-bit memory addresses?
Left shift 4 bits
16-bit register
+
16-bit register
0000
FFFFF
Addr1 + 0FFFF
Segment
(64K)
Offset
Addr1
20-bit memory address
Offset
Segment
address
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00000
Intel 80x86 memory address generation
1M memory space
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Fetching Instructions
 Where to fetch the next instruction?
8088
CS
IP
Memory
1239
0012
123A2
MOV AL, 0
123A2
 Update IP
—
After an instruction is fetched, Register IP is updated as follows:
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IP = IP + Length of the fetched instruction
— For Example: the length of MOV AL, 0 is 2 bytes. After fetching this instruction,
the IP is updated to 0014
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Accessing Data Memory
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 There is a number of methods to generate the memory address when
accessing data memory. These methods are referred to as
Addressing Modes
 Examples:
—
Direct addressing: MOV AL, [0300H]
DS
Memory address
—
1
1
2
3
4
0
0
3
0
0
2
6
4
0
(assume DS=1234H)
Register indirect addressing: MOV AL, [SI]
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DS
Memory address
1
1
2
3
4
0
(assume DS=1234H)
0
3
1
0
(assume SI=0310H)
2
6
5
0
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A memory system showing the placement of four memory segments.
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– a memory segment can touch
or overlap if 64K bytes of me
mory are not required for a se
gment
– think of segments as window
s that can be moved over any
area of memory to access dat
a or code
– a program can have more tha
n four or six segments,
• but only access four or six
segments at a time
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Accessing Data Memory
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 There is a number of methods to generate the memory address when
accessing data memory. These methods are referred to as
Addressing Modes
 Examples:
—
Direct addressing: MOV AL, [0300H]
DS
Memory address
—
1
1
2
3
4
0
0
3
0
0
2
6
4
0
(assume DS=1234H)
Register indirect addressing: MOV AL, [SI]
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DS
Memory address
1
1
2
3
4
0
(assume DS=1234H)
0
3
1
0
(assume SI=0310H)
2
6
5
0
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DATA ADDRESSING MODES
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MOV instruction provides a basis for explanation of data-addressing modes
opcode
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an opcode, or operation code, tells the microprocessor which
operation to perform
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MOV BX, CX
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• The source register’s contents do not change.
• the destination register’s contents do change
• The contents of the destination register or destina
tion memory location change for all instructions e
xcept the CMP and TEST instructions.
• Note that only the rightmost 16 bits of register EB
X change. The MOV BX, CX instruction does not
affect the leftmost 16 bits of register EBX.
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Register Addressing
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80286
Register
80386 +
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8-bit
16-bit
Accumulator
AH, AL
AX
EAX
RAX
Index
BH, BL
BX
EBX
RBX
Count
CH, CL
CX
ECX
RCX
DX
EDX
RDX
Stack Pointer
SP
ESP
RSP
Base Pointer
BP
EBP
RBP
Src. Index
SI
ESI
RSI
Dest. Ind
DI
EDI
RDI
Data
DH, DL
32-bit
80486 +
64-bit
R8 – R15
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 Important for instructions to use registers that are
the same size.
 never mix an 8-bit \with a 16-bit register, an
8- or a 16-bit register with a 32-bit register
 this is not allowed by the microprocessor and
results in an error when assembled
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Immediate Addressing
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 Term immediate implies that data immediately follo
w the hexadecimal opcode in the memory.
 immediate data are constant data
 data transferred from a register or memory locat
ion are variable data
 Immediate addressing operates upon a byte or wor
d of data.
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MOV EAX,3456H
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Before the instruction executed
After the instruction executed
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• the source data overwrites the destination data.
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 In symbolic assembly language, the symbol # precedes imme
diate data in some assemblers.
 MOV AX,#3456H instruction is an example
 Most assemblers do not use the # symbol,
but represent immediate data as in the MOV AX,3456H instruc
tion.
 an older assembler used with some Hewlett-Packard logic d
evelopment does, as may others
 in this text, the # is not used for immediate data
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 The symbolic assembler portrays immediate data i
n many ways.
 The letter H appends hexadecimal data.
 If hexadecimal data begin with a letter, the assem
bler requires the data start with a 0.
 to represent a hexadecimal F2, 0F2H is used
in assembly language
 Decimal data are represented as is and require no
special codes or adjustments.
 an example is the 100 decimal in the
MOV AL,100 instruction
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 An ASCII-coded character or characters may be de
picted in the immediate form if the ASCII data are
enclosed in apostrophes.
 Binary data are represented if the binary number i
s followed by the letter B.
 in some assemblers, the letter Y
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Labels
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 Each statement in an assembly language program
consists of four parts or fields.
 The leftmost field is called the label.
 used to store a symbolic name for the memory l
ocation it represents
 All labels must begin with a letter or one of the foll
owing special characters: @, $, -, or ?.
 a label may any length from 1 to 35 characters
 The label appears in a program to identify the na
me of a memory location for storing data and for o
ther purposes.
NEXT:
MOV AX, [BX]
; next element
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 The next field to the right is the opcode field.
 designed to hold the instruction, or opcode
 the MOV part of the move data instruction is an
example of an opcode
 Right of the opcode field is the operand field.
 contains information used by the opcode
 the MOV AL,BL instruction has the opcode MOV
and operands AL and BL
 The comment field, the final field, contains a com
ment about the instruction(s).
 comments always begin with a semicolon (;)
NEXT:
MOV AX, [BX]
; next element
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Direct Data Addressing
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 Applied to many instructions in a typical program.
 Two basic forms of direct data addressing:
 direct addressing, which applies to a MOV betwee
n a memory location and AL, AX, or EAX
 displacement addressing, which applies to almost
any instruction in the instruction set
 Address is formed by adding the displacement to th
e default data segment address or an alternate seg
ment address.
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Direct Addressing
Micro-Computer Applications
 Direct addressing with a MOV instruction transfers
data between a memory location, located within th
e data segment, and a register.
 usually a 3-byte long instruction
MOV CX,DATA
 loads CX from the data segment memory location
DATA (1234H).
 DATA is a symbolic memory location, while
1234H is the actual hexadecimal location
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Direct Data Addressing
Micro-Computer Applications
• Example
• DS=1512H
MOV AL, 99H
MOV [3518], AL
After execution memory location
Logical address DS:3518
Physical address18638
will have 99H
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Register Indirect Addressing
Micro-Computer Applications
 Allows data to be addressed at any memory locati
on through an offset address held in any of the foll
owing registers: BP, BX, DI, and SI.
 In addition, 80386 and above allow register indire
ct addressing with any extended register except E
SP.
 In the 64-bit mode, the segment registers serve n
o purpose in addressing a location
in the flat model.
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Register Indirect Addressing
Micro-Computer Applications
MOV AX,[BX]
BX = 1000H and DS = 0100H.
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 The data segment is used by default with register
indirect addressing or any other mode that uses BX,
DI, or SI to address memory.
 If the BP register addresses memory, the stack se
gment is used by default.
 these settings are considered the default for
these four index and base registers
 For the 80386 and above,
 EBP addresses memory in the stack segment by
default.
 EAX, EBX, ECX, EDX, EDI, and ESI address mem
ory in the data segment by fault.
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Base-Plus-Index Addressing
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 Similar to indirect addressing because it indirect
ly addresses memory data.
 The base register often holds the beginning loca
tion of a memory array.
 the index register holds the relative position
of an element in the array
 whenever BP addresses memory data, both t
he stack segment register and BP generate th
e effective address
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Locating Data with Base-Plus-Index Addressing
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MOV DX,[BX + DI]
 The Intel assembler requires this addressing mod
e appear as [BX][DI] instead of [BX + DI].
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 The MOV DX,[BX + DI] instruction is MOV DX,[BX
][DI] for a program written for the Intel ASM ass
embler.
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Base-plus-index addressing mode
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MOV DX,[BX + DI]
DS=0100H, BX=1000H and DI=0010H
memory address 02010H is accessed because
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An example of the base-plus-index addressing mode. Here an element (DI) of an
ARRAY (BX) is addressed.
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Register Relative Addressing
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 Similar to base-plus-index addressing and displaceme
nt addressing.
 data in a segment of memory are addressed by add
ing the displacement to the contents of a base or a
n index register (BP, BX, DI, or SI)
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MOV AX, [BX+1000H]
BX=1000H and DS=0200H .
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Addressing Data with Base Relative-Plus-Index
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 Least-used addressing mode.
 Figure 3–12 shows how data are referenced if the i
nstruction executed by the microprocessor is MOV
AX,[BX + SI + 100H].
 displacement of 100H adds to BX and SI to form
the offset address within the data segment
 This addressing mode is too complex for frequent u
se in programming.
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MOV AX,[BX + SI + 100H]
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DS=1000H
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WHY Addressing Arrays with Base Relative-Plus-Index ?
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 Suppose a file of many records exists in memory,
each record with many elements.
 displacement addresses the file, base register a
ddresses a record, the index register addresses
an element of a record
 Figure 3–13 illustrates this very complex form of a
ddressing.
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Base relative-plus-index addressing used to access a FILE that contains multiple
records (REC).
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Scaled-Index Addressing
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 Unique to 80386 - Core2 microprocessors.
 uses two 32-bit registers (a base register and
an index register) to access the memory
 The second register (index) is multiplied by a scali
ng factor.
 the scaling factor can be 1x, 2x, 4x, 8x
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Examples of scaled-index instructions.
 MOV AX,[ EBX + 2*ECX]
 MOV [4 * ECX ],EDX
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References:
Based on slides from B. Brey, The Intel Microprocessor: Archit
Micro-Computer Applications
ecture, Programming, and Interfacing, 8th Edition, 2009 & other
s
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