Transcript CMSC 250
Chapter 1, con't., Combinatorial circuits CMSC 250 1 Basic logic gates An and gate: An or gate: A not gate: CMSC 250 2 Discrete Structures CMSC 250 Lecture 6 CMSC 250 3 Combining & determining I/O relationship From a circuit to a Boolean formula: p q r CMSC 250 p ~(q ^ r) 4 Draw a circuit for: p, q & r are inputs. Simplify before building the circuit. CMSC 250 p 1 1 1 1 0 0 0 0 q 1 1 0 0 1 1 0 0 r 1 0 1 0 1 0 1 0 output 1 1 0 1 0 0 0 0 5 Number conversions Different number system bases are used when convenient – some commonly-used bases are 10 (decimal), 2 (binary), 8 (octal), 16 (hexadecimal) – the base tells how many different numerals are used – the base also determines the value of each place Conversions from anything to base 10 – use the definition of the number system Conversions from base 10 to anything – use repeated integer division CMSC 250 6 Addition of binary numbers Carry if the number would be too large for the number system- if it is greater than 1 1001 + 10 CMSC 250 1001 + 11 1011 + 10 1101 + 111 7 Discrete Structures CMSC 250 Lecture 7 CMSC 250 8 Addition of octal and hexadecimal numbers Carry if the number would be too large for the number system (larger than 7 or 15) 7238 + 128 CMSC 250 2658 + 338 ABC16 + 1216 CDE16 + ED16 9 Two's complement To represent negative values in binary: 1. Find the binary equivalent of the absolute value. 2. Pad on the left to completely fill the bits in the specified bit width 3. Switch all of the 1's to 0's and 0's to 1's. 4. Add 1 to the result. • Example: find the 8-bit two's complement representation of -43: 1. 2. 3. 4. CMSC 250 4310 = 1010112 001010112 110101002 110101012 = -4310 10 Using a circuit for adding two bits input CMSC 250 Write as a logic expression Translate to circuits output p q carry sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 11 Half adder p and q are binary values (1 bit each) sum = (p q) ^ ~(p ^ q) carry = (p ^ q) p q sum carry CMSC 250 12 Full adder (for three bits) p q C1 half-adder #1 C S1 C2 r half-adder #2 S p, q, and r are binary digits p + q + r produces a sum value and a carry value CMSC 250 13 Parallel adders X3 Y3 X2 Y2 X1 Y1 Chain these half adders and full adders together for multi-bit addition X1X2X3 + Y1Y2Y3 = CA1A2A3 half-adder A3 carry A2 full-adder carry full-adder A1 carry CMSC 250 14 Discrete Structures CMSC 250 Lecture 8 CMSC 250 15 Draw a circuit for a 0 0 0 0 1 1 1 1 CMSC 250 b 0 0 1 1 0 0 1 1 c 0 1 0 1 0 1 0 1 xx 0 0 0 0 0 0 1 1 2 output 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 1 0 1 0 1 16 Topic not covered Simplifying circuits- there are techniques which exist (which are complex). CMSC 250 17