Transcript Resonant Boost Converter Design

Resonant Boost Converter
Design
Justin Burkhart
April 15, 2009
Presentation Outline
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Project Goals
The Class E Inverter
Resonant Rectifier
LDMOS Device Model
Completed Boost Converter Design
Project Goals
• Design a resonant boost converter using
TI LBC5 process LDMOS devices
• Targeted at automotive applications with:
– 11-16 Vdc Input
– 30 Vdc Output
– 10-20 Watts
– Highest possible switching frequency with
efficiency >80% (if possible)
The Class E Inverter
Adjusted to deliver DC and AC power to the load
Current (A)
1.5
0
• Assumed high enough Q such that io is
sinusoidal
• When the switch opens, circuit is designed
such that the voltage V(t) rings back to zero
D*T later thus providing a ZVS opportunity
Voltage (Volts)
• Switch is opened and closed periodically
I
0.5
-0.5
0
• L1 is large choke with only DC current
io(t)
1
10
20
30
Time (ns)
40
50
V(t)
Vo(t)
40
20
0
0
10
20
30
Time (ns)
40
50
The Class E Inverter
Adjusted to deliver DC and AC power to the load
Current (A)
1.5
Cons
• High peak device voltage
• Large choke inductor
• Sensitive to load changes
• Limited minimum output power when C1 is
constrained
I
0.5
0
Voltage (Volts)
-0.5
0
Pros
• Zero Voltage Switching
• Only one ground referenced switch required
io(t)
1
10
20
30
Time (ns)
40
50
V(t)
Vo(t)
40
20
0
0
10
20
30
Time (ns)
40
50
Resonant Input Inductor
To see what happens when the value of L1 is reduced break it into two
hypothetical inductors, one that carries only DC current and one that carries
only AC current.
In this configuration, L1-AC is in parallel with C1
This results with:
• Faster Transient Response
• Lower Minimum Output Power
• Flexibility in choice of C1
Equivalent Load for Class E
Inverter
The load of the Class E Inverter Circuit is tuned to look inductive and can be
modeled by an inductor and resistor
This equivalent load provides for a simpler design procedure when the
inverter will be used in a DC/DC converter
Solve for component Values
1. Assume DC current in the input
3. Solve for the drain voltage by integrating
current in the equivalent C1
2. Assume sinusoidal current in load
4. Solve for the fundamental Fourier
component of drain voltage
5. Set drain voltage and slope of drain
voltage to zero at switch turn on time
6. Solve for phase of the voltage and current
fundamental components
7. Solve for circuit component values
Resonant Rectifier
To transform the Class E inverter into a DC/DC boost converter, the output of
the inverter must be rectified
A resonant rectifier is used since the losses incurred by a hard switched
rectifier at high frequency are too high to maintain good efficiency
The rectifier load is modeled as a constant voltage source since the complete
DC/DC converter will use feedback to hold the output voltage constant
Resonant Rectifier
To maintain ZVS the rectifier must present the same impedance to the
Class E Inverter as the L-R load network
When designing the rectifier, the goal is to choose L and C such that rectifier
will have the same current Io(t) as the L-R circuit. This will maintain ZVS in
the inverter.
Rectifier Operation
Vdiode(t)
• Diode turns off when Io(t) goes < 0
• Initial conditions are known, thus
equations for Io(t) and Vdiode(t) can
be derived
• Using initial conditions, ton and toff
must be solved for
• Closed form solution is not easily
arrived at since equations are nonlinear and very messy
40
20
0
-20
0
10
20
Time (ns)
Vdiode(t)
30
40
10
20
Time (ns)
I o(t)
30
40
10
20
Time (ns)
30
40
50
0
-50
0
Current (Amps)
• Diode turns on when Vdiode(t) goes
> Vout
Voltage (Volts)
Voltage (Volts)
VAC+VDC
4
2
0
-2
0
Rectifier Equivalent Model
Rectifier
Model 1
Total Current: Solid Lines
DC Current: Dashed Lines
Model 2
Example Of Rectifier Tuning
Tune Resonant Frequency
2
Goal:
Fo
• Adjust the characteristic
impedance of the rectifier until the
desired output power is reached
1
Current (Amps)
• Adjust the resonant frequency of
the rectifier until the input current
has the desired phase
Increase
1.5
0.5
0
-0.5
-1
0
Tune Characteristic Impedance
2
22
1.5
20
Power Output (Watts)
Current (Amps)
10
15
20
Time (ns)
25
30
35
40
24
2.5
Decrease
Zo
5
1
0.5
0
18
16
14
-0.5
12
-1
-1.5
0
5
10
15
20
Time (ns)
25
30
35
40
10
20
25
30
35
Characteristic Impedance (Ohms)
40
LDMOS Device Model
Typical LDMOS Device Model
Simplified LDMOS Device Model
Parasitic capacitance measurement procedure
Device Measurement Data
Rds-on Data
• Test Device only has 1 bond wire per device terminal
• This is a limiting factor in measuring small parasitic device resistances
• TI process engineers report that Rds-on for devices in this lot were
measured at 165mOhm
• This would result with an estimate of about 475mOhm bond wire
resistance
Device Measurement Results
Coss Data
2.3 pF extra parasitic capacitance from
measurement
Ciss Data
1.45 pF extra parasitic capacitance from
measurement
Simulated DC/DC Converter
Converter Efficiency
Loss Breakdown by Component
24
86
22
85.5
20
85
18
84.5
16
84
14
83.5
12
11
12
13
14
15
Vin (Volts)
16
17
Efficiency (%)
Power Out (Watts)
Efficiency and Output Power
83
18
Gate Drive is Not Included
Future Work
• Device optimization
• Parametric variance analysis
• Gate driver
• Power section prototype
• Integrated controller design
• Complete converter