Transcript Design Considerations for Transmission Lines

A Unified Approach to Design
Distributed Amplifiers
Rasit Onur Topaloglu
PhD. Student
[email protected]
Limitations with Classical
Amplifiers
•High Gain-bandwidth product is the
aim in amplifier design
•Gain-bandwidth product is
proportional to transconductance
over capacitance
G.BW  gm/C
•Combining amplifiers in parallel does
not help as it also increases the total C
Tying Amplifier to Device Physics
•Input and output have capacitive
impedances
D
G
Cgs
Cds
S
•These capacitances can be incorporated
in or counted as capacitors in a
transmission line
Basic Transmission Line
•A low-pass transmission line can easily be
constructed of inductors and capacitors
..
Principle of Distributed
Amplification
•Couple two transmission lines by
amplifiers
..
RFin
..
RFout
Termination of Unwanted Waves
•There will be forward and backward
propagating waves at nodes
..
RFin
RFout
..
•Terminate unwanted ones using a load on
both lines
Exploitation of Amplifier
Capacitances
•Input and output capacitances of an
amplifier can be used to replace capacitors
..
drain line
RFout
RFin
..
gate line
•Even a single transistor amplifier
satisfactory
Design Considerations for
Transmission Lines
•Each lines designed to have a cut-off
frequency larger than targeted operation
frequency of amplifier by a safe margin
fc=1/( LC)
Zo= L/C
m-derived Sections for a Better
Matching
•LC sections (constant-k transmission
lines) matched to load using an m-derived
section to provide constant Z over a wider
range
•m=0.6 is identified as a practical rule of
thumb value
m-derived vs. Constant-k Lowpass T-section
•m=1 corresponds to constant-k
m-derived vs. Constant-k Line Z
over Frequency
•m=1 corresponds to constant-k
Phase Matching of Lines
•Cgs~4Cds for a transistor
•If L chosen to be constant, C matching
required on gate and drain lines for a better
amplifier response
•Either add additional C in parallel with
drain to increase it=> provides higher BW
•Or add additional C in series with gate to
reduce it=> provides higher gain
Staggering to Avoid Gain Peak
near Cut-off
•Staggering is introducing a deliberate
mismatch between gate and drain lines to
avoid a peak near line cut-off frequency
•Drain line cut-off chosen as ~0.7 times
gate line cut-off
Number of Sections
•Increasing number of sections increases
gain linearly as opposed to quadratic
increase in cascade amplifiers
Ag=1/4 x (Rg2Cin2Zo)
•Line losses and parasitics prevent an
infinite increase
nog=1/2 x Ag
•Optimal number of stages can be explored
analytically or by simulation
[A monolithic GaAs 1-13GHz traveling wave amplifier, Y. Ayasli, et. al.]
Design Example
[SOI CMOS Traveling Wave Amplifier with NF below 3.8 dB from 0.1-40 GHz, F. Ellinger]
Design Example
Design Example
Design Example
Reverse Transmission, dB
Input Reflection Coefficient
-20
-30
S(1,1)
dB(S(1,2))
-40
-50
-60
-70
-80
-90
freq (100.0MHz to 100.0GHz)
-100
1E10
2E10
freq, Hz
3E10
4E10 5E10
Design Example
Forward Transmission, dB
Output Reflection Coefficient
20
10
-10
-20
S(2,2)
dB(S(2,1))
0
-30
-40
-50
-60
-70
1E8
1E9
1E10
freq, Hz
6E10
freq (100.0MHz to 100.0GHz)
SOI CMOS Noise Figure and Gain
dB(AC.out)-dB(AC.in)
20
0
-20
-40
-60
-80
0
20
40
60
70
freq, GHz
NFmin
10
0
0
20
freq, GHz
40
PHEMT Noise Figure and Gain
Technology
Comparison
SOI CMOS 90nm,
17mA, 2V
Cgs=0.06pF
Cds=0.015pF
PHEMT
40mA, 2V
Cgs=0.27pF
Cds=0.030pF
Higher capacitance values makes possible to use
smaller inductors for same cut-off frequency
Lossy
Inductor
Model:
Inductor Q
assumed 20
@ 1GHz with
a parasitic
series resistor
of 10 and Q
being directly
proportional
to frequency
Design Considerations for PHEMT
•Cds used to decrease the high ratio difference between Cgs and Cds;
thereby obtaining a gain with less ripple.
•Compromising high frequency gain, a smoother response is obtained
•Usage of series Cgs would deteriorate low frequency response
•Same inductor value used for both gate and drain lines
PHEMT Gain&Noise Optimization
•Goals are set for gain and noise
•Random optimization used
•Only inductor used for the optimization value; thereby keeping
system specific termination and source resistors intact
PHEMT Optimization Results
After
optimization
With some sacrifice in gain ripple, noise figure has been significantly
improved and circuit operates up to 47GHz
Usage of Transmission Lines
After
optimization
•Using Richard’s transformation, inductors can be replaced by
transmission lines.
•Choosing an electrical length of 45 and a reference cut-off
frequency equal to the gate line, optimization gave a Zo of 30.6 and
an operation range of up to 57 GHz for noise considerations
Conclusions
•Broadband techniques will not be able to
outdo distributed amplifiers
•Distributed amplifiers, an ancient field of
study, will continue evolving as a good
field to work in
•60GHz low noise amplifiers for optical
circuits are almost here