Transcript SOC Consortium Course Material Multi-ICE(I)

JTAG, Multi-ICE and Angel
Speaker :沈文中
National Taiwan University
Adopted from National
Taiwan University
SOC Course Material
SOC Consortium Course Material
Outline
ARM debug Architecture
Content of JTAG
Content of Embedded ICE
Multi-ICE Arch.
Angel Arch.
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ARM debug Arch.(I)
 AXD can debug design through:
– ARMulator(software)
– Multi-ICE(hardware)
– Angel(hardware)
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ARM debug Arch.(II)
Limits of ARMulator
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–
–
–
Processor core model
Memory interface
Coprocessor interface
Operating system interface
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ARM debug Arch.(III)
Multi-ICE
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–
–
–
The solution for ARMulator limits
Can emulate custom logic
Use hardware to emulate truly results
Extended from JTAG Architecture
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ARM debug Arch.(IV)
Angel
– A hardware can be real-Monitor interface
– Angel communicates using ADP
– Allow multiple indep. sets of messages to share a
communications link
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Outline
ARM debug Architecture
Content of JTAG
Content of Embedded ICE
Multi-ICE Arch.
Angel Arch.
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JTAG Arch.
Serial scan path from
one cell to another
Controlled by TAP
controller
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JTAG principle(I)
In enable
I/O
in
Core logic
enable
out
Device ID reg
TDI
TMS
TDO
Bypass reg
Instruction reg
TCK
TAP controller
TRST
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JTAG Principle(II)
JTAG Signals
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TRST
Test reset signal
TDI Test data in
TMS Test mode select
TCK Test clock
TDO Test data out
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EmbeddedICE interface
Pin
Name
Function
1
SPU
System powered up, pin connected to Vdd through a 33
ohm resistor
3
nTRST
Test reset, active low
5
TDI
Test data in
7
TMS
Test mode select
9
TCK
Test clock
11
TDO
Test data out
12
nICERST
Target System Reset (sometimes referred to nSYSRST or
nRSTOUT)
13
SPU
System powered up, pin connected to Vdd through a 33
ohm resistor
2, 4, 6,
8,10,14
VSS
System ground reference (All VSS pins should be connected
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Outline
ARM debug Architecture
Content of JTAG
Content of Embedded ICE
Multi-ICE Arch.
Angel Arch.
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Debug extensions to the ARM core
The extensions consist of a number of scan chains around
the processor core and some additional signals that are
used to control the behavior of the core for debug
purposes :
– BREAKPT: enables external hardware to halt processor
execution for debug purposes.active high
– DBGRQ: is a level-sensitive input that causes the CPU to enter
debug state when the current instruction has completed.
– DBGACK: is an output from the CPU that goes high when the
core is in debug state
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The EmbeddedICE logic
This logic is the integrated onchip logic that provides
JTAG debug support for ARM core.
This logic is accessed through the TAP controller on the
ARM core using the JTAG interface. Consists of:
–
–
–
–
Two watchpoint units
A control register
A status register
A set of registers implementing the Debug Communications
Channel link
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Watch /break point
Watchpoints are taken when the data being
watchpointed has changed.
Breakpoints are taken when the instruction being
breakpointed reaches the execution stage. the
program counter is not updated, and retains the
address of the breakpointed instruction.
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Outline
ARM debug Architecture
Content of JTAG
Content of Embedded ICE
Multi-ICE Arch.
Angel Arch.
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Multi-ICE(I)
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Multi-ICE(II)
 Debugging software can be
run on different computer
through Network.
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The portmap application
To support network connections, an additional
application must be running on the windows
workstation that runs the The multi-ICE server.
the portmapper
allows software on
other computers on
the network to
locate the The
multi-ICE server.
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How multi-ICE differs from a debug monitor
A debug monitor is an application that runs on your target
hardware in conjunction with your application, and
requires some resources(ex:memory) to be avaible
The EmbeddedICE debug arch. Requires almost no
resources. Rather than being an application on the board,
it works by using :
– Additional debug hardware within the core, parts that enable the
host to communicate with the target
– An external interface unit that buffers and translates the core
signals into something usable by a host computer
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Outline
ARM debug Architecture
Content of JTAG
Content of Embedded ICE
Multi-ICE Arch
Angel Arch.
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Angel (I)
Angel system
– Debugger: Running on the host computer, giving instructions to
Angel and displaying the results obtained from it.
– Angel debug monitor: Running alongside the application being
debugged on the target platform.
– Armsd: The command line must be of the form:
armsd –adp –port s=1 –linespeed 38400 image.axf
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Angel (II)
Debug support
– Reporting and modifying memory and processor status
– Downloading applications to the target system
– Setting breakpoints
C library semihosting support
– Enabling applications linked the ARM C and C++ libraries to
make semihosting requests by SWI
Communications support
– Using ADP for communicates
– Providing an error-correcting communications protocol.
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Angel (III)
 Angel’s communications diagram
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Angel (IV)
Task management
– Ensuring that only a single operation is carried out at any time
– Assigning task priorities and schedules tasks accordingly
– Controlling the Angel environment processor mode
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Angel(V)
Exception handling
SWI
Undefined
Data, Prefetch Abort
FIQ,IRQ
Installing it to support semihosting requests ,
to allow applications and Angel to enter
Supervisor mode
Using 3 undefined instructions to set
breakpoints in code
Reporting the exception to the debugger,
suspend the application, and pass control back
to the debug
Enabling Angel communications to run off, or
both types of interrupt.
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Lab 6: JTAG and Multi-ICE
 Goal
– Set up the hardware and the
software of Multi-ICE unit and
target board.Use Multi-ICE to
debug.
 Principles
– Basic debug skill
– Debugger-Target Interface
 Requirements and Exercises
– Write a lotto program that generates
N sets of number. The user can
specify:
• Number of the set: N.
• The numbers must be included in these N
sets of number
• The numbers must not be included in
these N sets of number
 Discussion
 Guidance
– Overview of examples used in the
Steps
 Steps
– Multi-ICE connects the parallel port
of a workstation to the JTAG
interfaces of an ASIC
– What’s different between with
ARMulator and MultiICE or
ARMulator and Angel that we do
the debugging task.
– Angel debug monitor uses a serial line or
Ethernet to communicate with a
development host running an ARM
debugger.
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Reference Topic & Related Documents
 Multi-ICE [DUI_0048F_MICE2_2_UG]
 AXD and armsd Debuggers Guide
[DUI_0066D_AXDDG_2_UG ]
 Getting Started Guide [DUI_0064D_GSG_UG ]
 AFS_Referece_Guide
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