Transcript Goal of tests - Leonid Kurchaninov Home Page

L.Kurchaninov, G.Perrot
BEC system test
BEC System Test
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Goal of tests
Test setup
Setup in EMF
List of tests
Crate configurations
Test configurations
Status of tests
LARG ROD PRR
25 June 2004
 Slink data transfer
 Tests with FEB
 Power consumption
 ORx sensitivity
 ROD in different slots
 Summary remarks
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L.Kurchaninov, G.Perrot
BEC system test
Goal of tests
 Goal of the tests: to learn system aspects of the LARG ROD
 Assumed that all boards are debugged
 All board-level tests passed
 FW and SW finalized
 More details:
 BEC TF Report posted at LARG/Electronics web page
http://atlas.web.cern.ch/Atlas/GROUPS/LIQARGSTORE/Electronics/BEC_TF/report.pdf
 BEC test web page
http://kurchan.home.cern.ch/kurchan/Bect/bect.html
 Note
http://home.cern.ch/kurchan/Bect/bectdoc.pdf
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
Test setup
PM PC
INJECTOR
TBM
TTCex
TTCvi
CPU
 Location is chosen at LARG
EMF: bd. 2175/R-E24
RCC
INJECTOR CRATE
TTC
Optical
Busy
Electrical
splitter
ROS PC
P3: Busy
Electrical
ROD
ROD
ROD
ROD
ROD
Slink
Optical
SPAC
TBM
ROD crate with max. 5 RODs
Injector and TTC crate
Splitters
PC with 3 FILARs for readout
PC for monitoring
FEC and infrastructure for FEB
specific tests
P3: TTC
Electrical
CPU
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BC, Orbit, L1A
Electrical
P3: TTC
Electrical
FILAR
FILAR
FILAR
LARG ROD PRR
25 June 2004
ROD CRATE
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L.Kurchaninov, G.Perrot
BEC system test
Setup in EMF
Test of ORx
sensitivity
Test with
3 RODs
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
List of tests
T01
S-link data transfer tests with injectors for all configurations and different DSP codes
T02
VME data transfer tests with injectors for all configurations and different DSP codes
T03
Data transfer tests with one FEB
T04
Power consumption of the ROD and TM modules for different levels of activity
T05
Check for proper treatment of the TTC information by the PU and proper busy generation
T06
Measurement of the optical power margin for ROD inputs
T07
ROD functionality vs. position in crate
T08
Interference between neighboring modules
T09
Quality of signals at P3 backplane
T10
Studies of the effect of the loss of the TTC clock and effects of the TTCrx clock jitter
T11
Test for correct operation of the SPAC module
T12
Crate power consumption for all configurations and different DSP codes
T13
Sensitivity to LV spikes
T14
Crate RF emission for all configurations and different DSP codes
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
ROD crate configurations
 Constraints: 5 ROD modules, 12 PUs, 3 FILARs, one
Injector module (up to 24 FEBs)
 ROD-TM modes:
 S (staging) = 2PU, 2 Links
 N (normal) = 4PU, 4 Links
 The last configuration 5S is not very interesting
and will be done later
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
ROD crate configurations
to be tested
 Basic tests T01, T02 to be done
for all possible configurations
 Some configurations can not be
tested, e.g. T03 (FEB)
 For other tests not all
configurations are considered as
interesting, e.g. T04 (board
power)
In table:
NO = we are not going to test this
configuration
YES = configuration to be tested
LARG ROD PRR
25 June 2004
Test
1S
1N
3S
3N
5S
T01
T02
T03
T04
T05
T06
T07
T08
T09
T10
T11
T12
T13
T14
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
YES
NO
NO
NO
YES
YES
NO
NO
NO
NO
YES
NO
NO
NO
NO
YES
NO
NO
NO
NO
YES
NO
NO
NO
NO
NO
NO
YES
YES
NO
YES
NO
NO
YES
NO
YES
NO
YES
NO
NO
YES
NO
NO
NO
YES
YES
YES
YES
YES
NO
YES
NO
NO
NO
YES
YES
YES
YES
YES
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L.Kurchaninov, G.Perrot
BEC system test
Status of tests
 Started in Feb. 04. Start-up period was longer than expected
 Many upgrades of FW and SW done but no HW modifications
were needed up to now.
Test
Context
T01
T02
T03
T04
T05
T06
T07
T10
T11
Slink readout, data from INJ
VME data transfer
Slink readout, data from FEB
Boards power consumption
Busy and interrupts
Input power margin
ROD in different slots
Clock instability
SPAC module
LARG ROD PRR
1S
25 June 2004
1N
3S
3N
5S
Done Done Done Done
Done
Done
Not to be done
Done
Done
Done
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L.Kurchaninov, G.Perrot
BEC system test
T01: Slink data transfer
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No Glink cooling, typically T=50C
No TTC synchronization in DSP, no calculations in DSP
5 Injector signals splitted from 8 to 24 ROD inputs
Incremental data (different for each Injector output)
Acquisition rate from 3 kHz to 32 KHz depending on data verification
 Configuration 1N. Runs taken: 100 Mfrg, 46, 50, 562, 115, 226, 716, 746,
3031 - trigger rate up to 100 kHz, acquisition rate 12 kHz
 Configuration 1S. Runs taken: 1538 Mfrg, 101, 1633 - trigger rate up to
60 kHz
 Configuration 3N. Runs taken: 19 Mfrg, 144 - trigger rate up to 100 kHz,
acquisition rate 3 kHz
 Configuration 3S. Runs taken: ?? Mfrg, ?? -Trigger rate up to 60 kHz,
acquisition rate 3 KHz
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
T03: Tests with FEB
 Done in past with 40.00 MHz, no TTC synchronization
~180 Mfrg
 QPLL FEB output splitted to 8 ROD inputs (power = -16
dbm) Runs taken: 521 and 3000 Mfrg at each Slink.
Trigger rate 100 KHz, acquisition rate 32 KHz (only
parity check and half-channel symmetry)
 Optical sensitivity measured on 1 ROD ORx at –23.5 dbm
with an original signal at –8 dbm (optical splitter and
variable attenuator used)
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
T04: Boards power consumption
Reports in: http://home.cern.ch/kurchan/Bect/bect.html
ROD power consumption
measured as V drop at 0.001W
or 0.01W resistor
Voltage
Idle
Run
ROD +5V
4.83
4.88
ROD +3.3V
3.26
3.68
PU1 +3.3V
0.869
1.21
PU2 +3.3V
0.870
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PU3 +3.3V
0.859
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PU4 +3.3V
0.857
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TM current measured as V
drop at 0.01W resistor vs Acq
rate.
Extrapolation to
100 kHz: 0.271A
Measured values ~ design values
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
T06: ORx sensitivity
Report in: http://home.cern.ch/kurchan/Bect/bect.html
 Measured for 3 ROD
boards
 Example: ROD #FA, ch.1,2
connected directly to INJ,
ch.3-8 through splitter
 Glink errors for events ~
-17 dbm
 Glink errors without events
~ -21 dbm
 Long run of 650 Mevts
with 1 dbm margin
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
T07: ROD in different slots
 The same conditions as in T01
 ROD-TM were moved over slots 7-20. In each position a
short run taken with 5-6 Mfrg
 In slot 10 a long test of 400 Mfrg was done over night.
No errors detected
LARG ROD PRR
25 June 2004
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L.Kurchaninov, G.Perrot
BEC system test
Summary
 No fundamental problems with HW, FW or SW found
 No HW modifications were needed up to now
 Verified by today:
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FEB-ROD data transfer
ROD-PU-ROD data path
TM functionality and Slink data transfer
TBM functionality and P3 uniformity
SPAC functionality
 Many upgrades of FW and SW done during the tests. Not yet in final
shape, under intensive developments
 Not all tests done by today, the work is going on. Important:
 TTC synchronization
 Variable processing time (calcs in DSP)
 Histograming and VME bandwidth
LARG ROD PRR
25 June 2004
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