Transcript Chap09

Chapter 9
Logic Families and Their
Characteristics
1
Objectives
You should be able to:
Analyze internal circuitry of a TTL NAND gate for
both HIGH and LOW output states.
 Determine IC input and output voltage and current
ratings from the manufacturer’s data manual.
 Explain gate loading, fan-out, noise margin, and time
parameters.

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Objectives
(Continued)
Design wired-output circuits using open-collector
TTL gates.
 Discuss the differences and proper use of the
various subfamilies within both TTL and CMOS
ICs.
 Describe the reasoning and various techniques for
interfacing among the TTL, CMOS, and ECL
families of ICs.

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Digital Logic Families
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Three commonly used families:
TTL (transistor-transistor logic)
 CMOS (complementary metal oxide semiconductor)
 ECL (emitter-coupled logic)
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Subfamilies within each family
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Different speed, power consumption, voltage and
current levels, and temperature ranges
There are standardized numbering schemes but
prefixes may differ
The TTL Family
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NPN bipolar transistor
Physical model
 Schematic symbol
 Diode equivalent
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The TTL Family
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Two-input NAND gate
Multi-emitter transistor
Totem-pole output stage
HIGH level output typically 3.4 V
LOW level output typically 0.3 V
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The TTL Family
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7400 two-input NAND gate
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TTL Voltage and Current Ratings

Input/output current
Source current – IOH
 Sink current – IOL
 Low-level input current – IIL
 High level input current – IIH
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TTL Voltage and Current Ratings
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Fan-out is the number
of gate inputs of the
same sub-family that a
single output can
drive.
The IOH rating must be
less-than or equal-to
the sum of all IHS
ratings.
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TTL Voltage and Current Ratings
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Example of TTL gate sinking input currents
from two gate inputs using logic symbols
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TTL Voltage and Current Ratings
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Example of TTL gate sinking input currents
from two gate inputs using schematic symbols
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TTL Voltage and Current Ratings
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Example of TTL gate sourcing current to two
gate inputs using logic symbols
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TTL Voltage and Current Ratings
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Example of TTL gate sourcing current to two gate
inputs using schematic symbols
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TTL Voltage and Current Ratings
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Summary of I/O current and fan-out:
Low-level input current IIL = -1.6 mA (-1600 μA)
 High level input current IIH = 40 μA
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(The minus sign indicates current leaving the gate)
 IOL –
low-level output current = 16 mA (16,000 μA)
 IOH – high-level output current = -400 μA (-800 μA for
some)
 Fan-out is max number of gate inputs that can be
connected to a standard TTL gate output.
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Typically fan-out = 10.
Note: Current ratings are not the amount of current,
but the maximum current capability.
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TTL Voltage and Current Ratings
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Input/Output Voltages (graphical representation)
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Noise Margin
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Noise margin: The difference between high level
voltages and low level voltages
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TTL Voltage and Current Ratings
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Input/Output Voltages and noise margin
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Discussion Point

Locate the voltage and current ratings
covered so far on the following typical data
sheet (Figure 9.8).
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Pulse-Time Parameters
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Rise Time (tr) – Measured from 10% level to
90% level
Fall Time (tf) – Measured from 90% level to
10% level
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Propagation Delay
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Propagation Delay (tPLH and tPHL)
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Determined by transistor switching speed
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Power Dissipation
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Total power supplied to the IC power supply
terminals
Assume 50% duty cycle.
PD = VCC x ICC(av)
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Open-Collector Outputs
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Upper transistor is removed
Can sink current but cannot source current
Open-Collector Outputs
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To get a TTL OC output or a CMOS OD
output to produce a HIGH, a pull-up resistor is
required.
Wired-output operation
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Outputs from two or more gates tied together
Wired-AND logic
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Other TTL Considerations

Disposition of unused inputs and unused
gates:
Open inputs degrade noise immunity
 AND and NAND – tied HIGH
 OR and NOR – tied to ground
 Unused gates – force outputs HIGH
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Other TTL Considerations
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Power supply decoupling
TTL logic tends to produce spikes on the VCC line
 Connecting a 0.01 to 0.1 F capacitor between VCC
and ground pins
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Reduces EMI radiation
 Reduces effect of voltage spikes from power supply
 Should installed close to the IC
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Improved TTL Series
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74HXX series
Half the propagation delay
 Double the power consumption
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74LXX series
Twice the propagation delay
 Half the power consumption
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In both cases the speed-power product
remained about the same.
In most cases both have been replaced by
Schottky TTL and CMOS.
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Schottky TTL
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Main speed limitation of standard TTL is due
to capacitive charge in transistor base.
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Charge is stored when saturated
74SXX TTL series adds a Schottky diode
between the base and collector.
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Schottky TTL
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Lower-power Schottky (LS)
Power consumption significantly reduced
 Speed-power product 1/3 of 74SXX series and
1/5 of 74XX series
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Advanced low-power Schottky (ALS)
Propagation delay dropped from 9 to 4 ns
 Power dissipation from 2 to 1 mW per gate
 More expensive
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Fast (F)
Propagation lowered to under 3 ns.
 Device size dramatically reduced
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The CMOS Family
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MOSFETs
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Metal oxide semiconductor field-effect transistors
High input impedance and low power dissipation
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The CMOS Family
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N-Channel MOSFET
Built on P material
 Normally OFF
 Positive gate voltage induces the N-channel
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P-channel MOSFET
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Channel is formed by a positive gate voltage
Three major MOS families
PMOS: P-channel
 NMOS: N-channel
 CMOS: Complimentary P- and N-channel
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The CMOS Family
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CMOS inverter formed from N-and Pchannel MOSFETS.
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Other CMOS Gates
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Handling CMOS devices

Avoid electrostatic discharge
Ground work station, test equipment and
soldering irons
 Wear a wrist strap
 Don’t connect input signals with power off
 Connected unused inputs to VDD
 Don’t remove IC with power on
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CMOS Availability
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4000 series - original CMOS line
40H00 series - faster
74C00 series - pin compatible with TTL
74HC00 and 74HCT00 series
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Speedy, less power, pin compatible, greater noise
immunity and temperature operating range
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CMOS Availability
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74- BiCMOS series - low power and high
speed
74-Low Voltage series
See appendix B
 Nominal supply voltage of 3.3 V
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74AHC and 74AHCT series
Superior speed
 Low power consumption
 High output drive current
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CMOS Availability
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74AVC advanced very-low-voltage CMOS logic
Faster speed (maximum 2 ns)
 Very low operating voltages
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3.3 V, 2.5 V, 1.8 V, 1.5 V and 1.2 V
Dynamic output control
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Adjusts output impedance to minimize overshoot and
undershoot
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Emitter-Coupled Logic (ECL)
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Extremely fast
Increased power dissipation
Uses differential amplifiers
Figure 9-22
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Developing Technologies
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Newer technologies
Integrated injection logic (I2L)
 Silicon-on-sapphire (SOS)
 Gallium arsenide (GaAs)
 Josephson junction circuits
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In all cases the goal is higher frequencies and
increased density.
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Comparing Logic Families
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Performance specifications
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Comparing Logic Families
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Propagation delay versus power
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Comparing Logic Families
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Power supply current versus frequency
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Interfacing Logic Families
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TTL to CMOS
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Interfacing Logic Families
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TTL to CMOS
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Pull-up resistor
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Interfacing Logic Families
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CMOS to TTL
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Interfacing Logic Families
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CMOS to TTL
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Interfacing Logic Families
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Interfacing Logic Families
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Level Shifting
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Level-shifter IC: 4050B
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Interfacing Logic Families
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Level Shifting
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Level-shifter IC: 4504B
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Interfacing Logic Families
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ECL Interfacing
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FPGA Electrical Characteristics
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Each manufacturer of PLDs has different
electrical characteristics.
Set the VCCIO to the required voltage for the
input/output ports
FPGA Electrical Characteristics
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You must also make appropriate changes to the
sink and source current ratings.
IOL and IOH are changed under program control
Range from 2 mA to 24 mA
 Called Programmable Drive Strength
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Summary
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There are three stages of internal circuitry in a
TTL IC: input, control, and output.
The input current to an IC gate is a constant
value specified by the manufacturer.
The output current of an IC gate depends on the
size of the load connected to it. Its value cannot
exceed the maximum rating of the chip, IOL or
IOH.
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Summary
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The HIGH- and LOW-level output voltages of
the standard TTL family are not 5 V and 0 V but
typically are 3.4 V and 0.2 V.
The propagation delay is the length of time that
it takes for the output of a gate to respond to a
stimulus at its input.
The rise and fall times of a pulse describe how
long it takes for the voltage to travel between its
10% and 90% levels.
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Summary
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Open-collector outputs are required whenever
logic outputs are connected to a common point.
Several improved TTL families are available and
continue to be introduced each year providing
decreased power consumption and decreased
propagation delay.
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Summary

The CMOS family uses complementary metal
oxide semiconductor transistors instead of the
bipolar transistors used in TTL ICs.
Traditionally, the CMOS family consumed less
power but was slower than TTL. However,
recent advances in both technologies have
narrowed the differences.
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Summary
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The BiCMOS family combines the best
characteristics of bipolar technology and
CMOS technology to provide logic functions
that are optimized for the high-speed, lowpower characteristics required in
microprocessor systems.
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Summary
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Emitter-coupled logic (ECL) provides the
highest-speed ICs. Its drawback is its very high
power consumption.
A figure of merit of IC families is the product of
their propagation delay and power consumption,
called the speed-power product (the lower, the
better).
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Summary

When interfacing logic families, several
considerations must be made. The output
voltage level of one family must be high and low
enough to meet the input requirements of the
receiving family. Also, the output current
capability of the driving gate must be high
enough for the input draw of the receiving gate
or gates.
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