Transcript Schottky Diode on standard CMOS - Auto

Design and optimization of
Schottky diodes in CMOS
technology with application to
passive RFID systems
Auto-ID lab Adelaide
Overview
•
Introduction.
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Design and layout of Schottky diode.
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Modelling of designed SBD.
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Applications.
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Fabrication and measurements.
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Conclusion.
The General RFID Idea
The black spot
Normally a very weak reply is obtained
Example Applications
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What can you do with this technology ?
Supply chain benefits
–
Reduce out of stocks, reduce inventory, speed up delivery,
check freshness, track and trace, produce to demand,
identify sources of diversion, identify counterfeiting, theft
prediction, faster recalls
Consumer benefits
–
Direct order from home, smart appliances, (e.g. microwave,
washing machine, refrigerator), smart healthcare, assisted
living
New and less expected benefits
–
Customized products, smart recycling, checkout-less stores
Passive RFID
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RFID tag chip in standard CMOS technology.
Low size.
Low cost.
Integration with existing logics and other
modules.
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Supply sufficient operating power
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Metal directly deposited on N-Well.
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Titanium-Silicon/Tungsten-Silicon contact
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Functional but needs more improvements.
Fabricated through MOSIS
Cross Sectional view of SBD
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Design a diode structure to minimize series
resistance of n-well.
Cross Sectional view of SBD
Equivalent circuit
Multi-finger Schottky contact
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Reducing the series resistance
Increasing the perimeter
Decrease junction capacitance
Prototyped SBD sizes
No
Area(squar
Contact
Perimeter
e PicoFingers Dimension
(Micro-meter)
meter
(um*um)
SD1
0.23
1.92
1
0.48x0.48
SD2
0.23
1.92
1
0.48x0.48
SD3
1.49
7.20
1
0.48x3.12
SD4
16.12
72.90
6
0.48x5.6
SD5
14.4
60.96
1
0.48x0.30
RFID Ant Model & Matching
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Start from dipole antenna model
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Use the model from “Modeling And Simulation of A Dipole Antenna
for UWB Applications using equivalent spice circuits” John F.M.
Gerrits, etc. Centre Suisse d'Electronique et de Microtechnique
SA (CSEM) Neuchâtel – SWITZERLAND
source
antenna
Rs
L1
C1
Rl
+
VTX
-
Rrad
+
R1
C2
Rr
V(Rrad)
+
Vrx
-
0
Matching and Optimal Input Level
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Equivalent circuit of RFID chip
Rs
•
•
jXs
Vrx value for 73  (half wavelength dipole) radiation
resistance at 150uW input
50
resistor voltage swing
Vrx 
( p  p )  2 2  P  Rr  2 2 150uW  73  0.296V
Vload ( p  p )
Rload
 2 2  P  Rr 
Rload  Rr
50
 2 2  150uW  73 
 0.120V
73  50
Matching and Optimal Input Level
(Cont.)
•
Quality factor of the RFID circuit (Serial configuration)
Xs
Q
Rs
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Maximum voltage swing across the RFID chip
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150uW input would have a 0.7V Vp-p input
No other rectifier structure will work except Schottky
diode rectifier structure
V p p
•
Rs
 2  2  P  Rr 
Q
Rr  Rs
Hard to decrease the input capacitance to increase the Q
Rectifier circuit (SBD application)
SBD Rectifier layout
Measurement Plan
•
•
Discrete SBD test
GSD probing pads for de-embedding
S parameters
DC parameters
SBD rectifier test
Input impedance
Matching circuit/board
Antenna
Reader/Signal generator and PA+Antenna;
Optimised tag
Discrete SBD Test
Prototype Reader
Future Work
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Test and extract the model parameters
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Validating the SBD model
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Improve the quality factor of the SBD
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Increase reverse direction breakdown voltage
by guard ring (fabricated version dose not
have)
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Improve efficiency by reducing parasitic
capacitance
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Better impedance matching capabilities
Q&A
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Thank You