Transcript Timers and ATD - Rochester Institute of Technology

Timers and ATD
Features Covered
Timers
Input Capture
ATD
Features Not Covered
Pulse Accumulator
OC7 Data Output
Timer Modes
For External Interrupt Generation
For Timers
Turning on the timer
Set to 1 to enable
Clock counts in TCNT
Creating a regular time interrupt 1
Clock prescale @ 8MHz
Resolution = 125ns X Prescale Factor
Max Duration = 125ns X Prescale Factor X (2^16)
Interrupt Triggering
Set to one to enable interrupt for that port
Write a One to clear the interrupt flag
Scheduling an Interrupt
• Must be in output compare mode.
• Store the time to interrupt in the
corresponding TC register.
In the interrupt handler
• Clear the interrupt by writing a
1 to the correct bit in TFLG1.
• Schedule the next interrupt
relative to the TC, not the
TCNT.
• Note, the example code
schedules future interrupts off
of the TCNT, which will cause
the period to drift due to
interrupt handling time.
Movb
FLG1
#$80,TFLG1
;clear C7F
;Schedule Next T7
Interrupt
ldd
into D
TC7H
;Load Timer Counter
addd
T7RATE
;Add T7RATE to D
std
TC7H
;Store D to TC7H
bsr
work
;do actual work
rti
Automatic Actions
Example 5ms clock
T7RATE
equ
#1250
;1250 / 250KHz = 5ms
Timer7vec
equ
$0B20
;Timer 7 Interrupt vector for version B (Green Board)
sei
movw
;set interrupt mask - disable interrupts
#Timer7IRQ,Timer7vec
;Load Address of Timer7IRQ into vector
movb
#$05,TMSK2
;Prescalar = /32 = 250KHz clock
movb
#$80,TIOS
;Set Timer 7 and Timer 6 to output compare
movb
#$80,TCTL1
;Set Timer 7 and Timer 6 output to toggle
movb
#$80,TMSK1
;Enable interrupt for Timer 7
; Schedule first interupt Relative to TCNT
ldd
addd
std
TCNTH
;Load Timer Counter into D
T7RATE
;Add T7RATE to D
TC7H
;Store D to TC7H
;Schedule Timer 6 Interrupts
movb
#$80,TSCR
;Enables timers
;do nothing else before enabling
cli
;clear interrupt mask - enable interru
Timer7IRQ
Movb
interupts
#$80,TFLG1
;clear C7F FLG1
;Schedule Next T7 Interrupt
ldd
TC7H
;Load Timer Counter into D
addd
T7RATE
;Add T7RATE to D
std
TC7H
;Store D to TC7H
Input Capture
• Bit in TIOS should be clear
• Select which edge to trigger on in
• When the edge occurs, an input is generated
(if enabled) and the current TCNT is copied
into the TC for that port.
ATD
• Benefits over external ATD
–
–
–
–
Easier to set up, less wiring.
More accurate ( up to 10 bits ).
You get 8 channels ( 0 – 7 ).
Still have to level shift to between 0 and 5V
Proper Configuration
Signal
Source
+
Conditioning
For Low Frequency Signals
Add a resistor to protect HC12 in case
input goes above 5V or less than ground.
<1K
68HC12
0~5V
R
Powering On the ATD
Write a 1 here
Allow 100us to stabilize
Other Bits Control
ATD Interrupts
Select Time per sample
Sets 10 Bit mode when 1
Choose What to sample
4 Or 8 Conversions
Divide Conversions between registers?
Run Continuously?
Which Ports to run conversion on
•Sample Values
$70
-Continuously do one conversion on each ATD port
$67
-Continuously do 8 conversion sequences on port 7
Getting the Results
• Read ADRnH to get 8 ( or 10 ) bits of ATD
data Most significant 8 bits in ADRnH,
lower two bits in ADRnL.
• If the flag in ATDSTAT is 1, the conversion
is complete.