Transcript Week10

Week10
Boolean Instructions on the 8051
Boolean Instructions
 Boolean
(or Bit) addressable capability is unique to the
8051
Enables efficient handling of bit values
Having bit variables makes efficient use of memory
 The addresses between 20H and 2FH (i.e. 16 locations)
can be accessed in a bitwise manner (as well as the
normal byte wide way)
 The key idea is that there are special instructions that
are specifically for bit operations
Boolean Instructions
SFRs
FFh
FFh
InDirect
Addressing
80h
128
bytes
Direct
Addressing
80h
Direct &
Indirect
Addressing
128 bytes
20h
00h
8 bits
32 bytes
used
128
bytes
0030H
002FH
002EH
002DH
002CH
002BH
002AH
0029H
0028H
0027H
0026H
0025H
0024H
0023H
0022H
0021H
0020H
001FH
Boolean Instructions
 Shown
to the right are all the
bits in address locations 20H to
2FH and their corresponding
bit addresses
 For
example bit 2 of the byte at
address 21H has a bit address
of 0AH
 There
are a total of 128 bit
addresses for the 16 bytes
between 20H and 2FH
0030H
002FH
002EH
002DH
002CH
002BH
002AH
0029H
0028H
0027H
0026H
0025H
0024H
0023H
0022H
0021H
0020H
001FH
7F 7E 7D 7C 7B 7A 79 78
77 76 75 74 73 72 71 70
17 16 15 14 13 12 11 10
0F 0E 0D 0C 0B 0A 09 08
07 06 05 04 03 02 01 00
Boolean Instructions
 Seen
bit addresses, but how are they used?
 Ans:
Special boolean instructions operate on bit
addresses
 Also referred to as bit variable manipulation instructions
 Some
examples include
CLR 7CH
SETB 01H
CPL 18H
 What
; clear bit
; set bit
; complement bit
does the following instruction do
MOV 7CH,A
Excerise: Clear a bit, without using a bit instruction!!
Boolean Instructions
 Here
are all the
boolean
instructions
represents
a bit address
 bit
ANL
ANL
CLR
CLR
CPL
CPL
JB bit,rel8
JBC bit,rel8
JNB bit,rel8
MOV C,bit
MOV bit,C
ORL C,bit
ORL C,/bit
SETB bit
SETB C
C,bit
C,/bit
bit
C
bit The benefit of these instructions is that each instruction
C
provides an efficient way to manipulate or test a bit
F0H
B
E0H
.ACC
D0H
PSW
C8H
T2CON
B8H
IP
B0H
P3
A8H
IE
A0H
P2
98H
SCON
90H
8FH
8EH
8DH
8CH
8BH
8AH
89H
88H
87H
P1
TH1
TL1
TL1
TL0
TMOD
TCON
PCON
83H
82H
81H
80H
DPH
DPL
SP
P0
SFRs (Revisted)
Certain SFRs are bit addressable
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
B
.ACC
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
TH0
TH1
PCON
Boolean Instructions
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
F7 F6 F5 F4 F3 F2 F1 F0
97 96 95 94 93 92 91 90
8F 8E 8D 8C 8B 8A 89 88
87 86 85 84 83 82 81 80
The highlighted SFRs are bit addressible
and have the bit addresses in the range
80H to FFH
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
B
.ACC
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
Example
 Clear
bit 3 of I/O port 1
 Remember
that port 1 controls
the digital voltage levels on
certain pins
 CLR
93H
 The
assembler can make life
easier
 CLR
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
F7 F6 F5 F4 F3 F2 F1 F0
97 96 95 94 93 92 91 90
8F 8E 8D 8C 8B 8A 89 88
87 86 85 84 83 82 81 80
P1.3
 The
instruction encoding is
C293H or in bits
 11000010
10010011
Actually, most of the bit addresses in
the SFRs have symbolic names
I/O ports on 8051

There are 4 I/O ports on the 8051



These ports provide a way of communicating with the
real world



Each port is 8 bits wide
Individual bits can be configured as either a digital input
or digital output
Available as pins on the 8051 device
Port pins operation is controlled through instructions
that access the port registers in the SFR section of
memory
Look at the details of Port 0


See how a bit of information is stored
See how the same line can act as either a digital input
or a digital output
I/O ports’ SFRs
Note: On reset or power-on, the Port
SFRs contain 0xFF. Why?
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
B
.ACC
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
TH0
TH1
PCON
P0.0
I/O port 0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Functional diagram of 1
of the 8 I/O ports for
Port 0
The execution of
an instruction
provides data and
control information
for these internal
port signals
Writing bit to a port line
SETB P0.X
VCC
1
If port pin is being
used as output, an
external pull-up
resistor is needed
1
NMOS transistor
switches off
0
P0.X pin is floating
if there is no pullup resistor
Writing bit to a port line
CLR P0.X
VCC
Current flows
through pull-up
resistor to GND
(other loading)
0
0
NMOS transistor
switches on
1
P0.X pin is pulled
to GND
Reading from a port line. First must write a 1,
NB: Note that
so as to turn off the NMOS transistor
signal level on pin
SETB P0.X
is read and NOT
the latch value
Can then read the signal on the pin
- the instruction
JB P0.X,start_pump
determines this
1
0
NMOS transistor is
off
P0.X pin now acts
as input
Some instructions (see next slide for list)
NB: Note that
read and modify the bit stored on the
signal level on
latch
CPL P0.X
latch is read and
NOT the pin
value in this case
01
01
These read and
modify instructions
are used when the
port is being used as
an output
Read/modify instructions
ANL P1,A
ORL P2,A
XRL P3,A
JBC P1.1,Loop
CPL P3.0
INC P2
DEC P2
DJNZ P3,Loop
MOV P2.1,C
CLR P2.6
SET P1.3
Port 1
Key Points
- Does not have
dual function
-Has internal
pullup resistor on
each line
-Port 2 and 3 have
internal pullups
also
-Still use same
approach as Port0
to configure a line
as an input
Example: Using port 0 to
drive a LED and to read a
switch (SPST) state
Steps
1.
Write a 0 to P0.2 to turn LED on, or
a 1 to turn off
CLR P0.2
; on
SETB P0.2
; off
VCC
2. Configure P0.3 as input by writing a
1 to p0.3 latch
R1
VCC
SETB P0.3
D1
8051
P0.2
R2
P0.3
SW1
3. Read from P0.3 pin to determine
whether switch is open or close.
One example is the following which
continously reads the switch until it
is closed
loop: JB P0.3, loop
Note that on reset, all ports have 1
stored on the latch, making each
; Description
;
;
;
: Switches the port pin P3.4 on and off with
200mSec period @ 50% duty cycle. The pin could be used to
turn on and off a LED
PORT_PIN_LED
EQU
P3.4
; Connected to red LED on evaluation board
;____________________________________________________________________
; MAIN PROGRAM
ORG 0000H
LJMP main
ORG
0048H
main:
CPL
CALL
JMP
PORT_PIN_LED
delay
main
; toggle (complement) the LED
;-------------------------------------------------------------; Subroutine : delay
; Description : Subroutine which introduces a time delay by
;
repeatedly executing an instruction
;
The repetition is controlled by nested loops.
;
The total delay is approx 100ms
;oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
delay:
; delay 100ms
MOV
R7,#200
; 200 * 500us = 100ms
dly1:
MOV
R6,#250
; 250 * 2.us = 500us
dly2:
DJNZ
R6,dly2
; sit here for 500us
DJNZ
R7,dly1
; repeat 200 times (100ms delay)
RET
;____________________________________________________________________
END
;********************************************************************
;
; Author
: R. Conway
; Date
: Feb 2000
; File
: lab4a51
; Hardware
: Any 8051 based Microcontroller
; Description
: Reads in from an input port pin P3.2 and uses this
;
input to either switch the port pin P3.4 on and off.
;
Note the switch is debounced through hardware
;
; CIRCUIT
Vcc
Example
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8051
|-|
---| | 270R
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Vcc
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LED |_|
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/ |
|-|
P3.4 |-|->0---(/)--| | 100K
| |/
\//
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Schmitt
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/|
/|
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P3.2 |--o<-|----o< |-------------|------|
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0.01uF --/
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--/ Switch
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o/
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Gnd
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FLOWCHART
-----------------| Configure Port(s)|
-----------------|---------<---------------------------|
|
Turn off LED
|
|
-----------------|
|---------<------|
/
\
|
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/ Is
\
Yes
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/
switch \--->------|
\ opened /
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\
/
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\ /
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| No
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-----------------|
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Turn on LED
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-----------------|
|---------<------|
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/
\
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/ Is
\
Yes
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/
switch \--->------|
\ closed /
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\
/
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\ /
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| No
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---------->-----------
Example
;********************************************************************
PORT_PIN_LED
EQU
P3.4
; Connected to red LED on evaluation
PORT_PIN_SWITCH
EQU
P3.2
; See above schematic
Example
;____________________________________________________________________
; MAIN PROGRAM
CSEG
ORG
0000H
SETB PORT_PIN_SWITCH
; Make this PORT_PIN an input
CLR
; Switch this PORT_PIN off (output)
loop:
PORT_PIN_LED
open:
JB PORT_PIN_SWITCH, open
SETB PORT_PIN_LED
; Stay here if switch is opened
; Turn LED on
close:
JNB PORT_PIN_SWITCH, close
; Stay here if switch is closed
JMP loop
;____________________________________________________________________
END
Appendix
More on I/O ports
Using external transistor
switches
V1 can be > VCC
V1
R1
V1 cannot be > VCC
Because internal pullup
limits
V1
8051
base
current,
R3 it may not be
P3.2
TR2
possible
to fully switch
on TR1
This means using a R4high gain
transistor
D1
8051
R2
P3.2
TR1
D2
Not needed
(when pull up
present)
Be carefull when using Port 0 as
there are no internal pullup
resistors
Using external transistor
switches
V1 can be > VCC
V1
No problem here with turning on
TR2 as the port output can sink
R1
up to 10 mA typically
V1 cannot be > VCC
V1
8051
R3
P3.2
TR2
D1
R4
8051
R2
P3.2
TR1
D2
Not needed
(when pull
present)
Example of Depending
using on
relay
control
type of to
motor
to be used,
normally can used special ICs such as Ha motor
bridges
or motor control ICs





Electromechanical device
No electrical connection
between drive circuitry and
switching side
Need external diode to
prevent back EMF from
damaging transistor when
switched off
Cannot switch at high speed
Closed switch has very low
resistance (milli ohms)
12V
VCC
Relay1
D1
From uC
R1
TR1
Motor
Motor GND
Digital
GND
Solid State Relays (SSR) are also available,
with isolation and higher swicthing speeds
Using an optocoupler
VCC2
VCC1
R1
TTL
o/p
R2
Exercises
What is a boolean (bit) instruction?
What are the range of addresses for bit addresses
How does the 8051 distinguish between bit addresses
and byte addresses?
Explain the operation of the following instructions
1.
2.
3.
4.
1.
2.
5.
CPL 0x43
JB 0x44, action
When dealing with I/O ports, some instructions
access port pins, while some access the SFR. Give
one example of each
Exercises
6.
A program reads from Port 1.1 and port 1.2
and turns on an LED on P1.2 if both inputs are
high.
1.
2.
Draw a flow chart first
Detail the assembly code