Transcript lna - Jack Ou

Low Noise Amplifier
DSB/SC-AM Modulation
(Review)
Frequency Shift Property
(Review)
Frequency Spectrum of DSB/SCAM Signal (Review)
If the Receiver Uses a Different
Frequency to Demodulate
(Keep by using with LPF)
Use an LNA Circuit to Reduce
Noise
(11/20)
(11/27)
(12/4)
Design of a Low Noise Amplifier
1.
2.
3.
4.
5.
6.
7.
8.
Transistor Biasing
Add L1 (Ls) and Lg
Add Ls
Adjust Lg
Generate gate bias voltage
Add M2
Design the output resonant network
Reduce the quality of output tank!
Design of a Low Noise Amplifier
• Source Resistance (RS) is 50 Ω
• Assume a bias current of 1 mA
• Assumed: gm/ID=20 mS/mA
Determine M1
Initial assumptions:
1. VDS1=0.3 V
2. VSB=0 V (DC)
3. gm/ID=20 mS/mA
4. ID=1 mA
gm/ID Calculation
Device Simulation
Add L1& Lg
Impedance Measurement
Our initial L1 and Lg does not
produce a perfect match!
Increase Ls to Increase Real
Impedance
(Increase Ls (or L1) to compensate
For CGD)
(Ls=270 pH)
(Ls=398 pH)
(The resonant frequency is still off!)
Adjust Lg
(fix at 3.5 GHz )
(Reduce Lg to increase the resonant freq)
Generate the Gate Voltage
Insulate the DC
The resistor RB and CB
isolate the signal path
from the noise of IB and MB.
Generate VGS of M1 (449.8 mV)
Find the width of MB
Determine RB
RB must be much larger than RP, the parallel equivalent resistance
Of RS. Otherwise, RB will load the input match network!
Input Bias Network!
Lg=14.85 nH, Ls=398 pH
Before adding the bias MB
After adding the bias MB
Determine M2
(Choose M2 to be
Identical to M1, for simplicity)
Also connect the gate of
M2 to VDD.
Determine the Output
Impedance
Use large L to provide DC bias and open at 3.5 GHz.
Use an artificially large C to provide DC isolation and a short at 3.5 GHz.
Use the port to calculate the S22 and output impedance.
Output Admittance
Goal: to cancel the imaginary admittance with an inductor!
An effective output capacitance of 135 fF
An effective output resistance of 1/1.107mS=900 Ohms
Since we know fo, and Ceff, we can calculate Leff: 15.3 nH
Adding Output Capacitance
• A 15.3 nH inductor is too large to
implement on silicon.
• We will add a 1 pF capacitor in
parallel to reduce the required
inductance to 1.82 nH
Schematic
(A port is used to calculate the output impedance)
903~1/1.107 mS
Comparison of Smith Chart
Location of S11 @ 3.5 GHz
After adding the bias MB
After the output load
The input resonant frequency
also shifted.
Input Resonant Frequency
Shifted to 3.15 GHz
We probably have to reduce Lg.
Real and Imaginary Part of
Output Impedance
Adjust Lg to Move the Resonant
Frequency to 3. 5GHz
S11 Using Lg of 10 nH
Input S11
Reflection coefficient
larger than 1!
May have to adjust reduce
the quality factor of the output tank!
Adjust Output Resistance
RL of 900 Ω
Transient Simulation
Trasient Simulation
Vout=1.225-1.1745=50.5 mV
Vin=441.637-439.96=1.67 mV
Av=30.23, 29.60 dB
Misc.
Determine Parameters Using
Matlab
DC Bias Simulation
Purpose: Verify gm/ID DC parameters through simulation.
Design of a Low Noise Amplifier
• Source Resistance (RS) is 50 Ω
• Assume a bias current of 1 mA
• Assumed: gm/ID=20 mS/mA