Transcript VMS-by-Rajesh-Menon-2003

Virtual Memory System
Rajesh Menon
CS 550
Fall 2003
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Topics Covered in this study
 VMS
• History
• Future?
 The Processor Mode and the Process
• Processor Modes
• Process States
• VMS OS model
• Scheduling
• SMP
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Topics Covered in this study (cont’d)
 Memory Management
• Demand Paged Virtual Memory
• Memory management subsystem
 VMS data structures
• Process Data Structures
• Memory management Data Structures
 Process Synchronization
• Process Synchronization between two processes
• Mutual Exclusion of Critical Regions
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DEC VMS
 Gained importance from 1980 – 1990
 VMS touted to be a leading-edge technology
• Virtual Memory
• 32 bit address space
• 128 bit floating point number precision
• Batch, Interactive and real-time processing
 DEC was taken over by COMPAQ and COMPAQ later merged with
HP.
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History
DEC Operating Systems
First Generation Computer OS
Major Features
Time sharing OS, Static partition of the
available physical memory.
OS in Programmable Digital Processor
(PDP-1)
Major Disadvantage:
Job-to-partition size had to match.
OS in later generations of
Programmable Digital Processor
(PDP-6, PDP-8)
Time sharing OS, Dynamic partition of
the available physical memory.
Major Disadvantages:
External Fragmentation due to the lack
of contiguous memory for process
allocation.
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History (cont’d)
OS in PDP-10
Re-locatable partition allocation:
Hardware solution to problem of
fragmentation in the form of base
register and bounds register.
Mapped memory: memory address
space seen by the program need not
be the physical address space used.
Second Generation Computer OS
RSTS OS on PDP-11
General Purpose, time sharing, Multiuser OS.
Paged Memory management.
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History (cont’d)
Third Generation Computer OS
VMS (Virtual Management System) on
VAX (Virtual Address Extension)
Demand paged virtual memory.
Modern Age Computer OS
SMP, Clustering.
OpenVMS
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Layered Operating System
Processor Modes
Original figure © 1992 by
Van Nostrand Reinhold.
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Process States
Original figure © by 1990 Professional Press, Inc.
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Wait State
 Voluntary Wait States: Current Process
• HIB or Hibernate State
• LEF or Local Even Flag
• CEF or Common Event Flag
• SUSP : A process need not be current (exception)
 Involuntary Wait States
• FPG or Free Page Wait
• PFW or Page Fault Wait
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Process Scheduling
 VMS can accommodate Batch, Interactive and Real-time processes
Process Type
Priority Level
Batch Process
3
Interactive Process
4-9
Real-time Process
System Manager’s Discretion
16 and above
0,1,2,10,15
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Process Scheduling (cont’d)
 VMS scheduling is preemptive based on the priority
 First-Come-First-Out (FIFO): Batch processes or processes with
similar priority, Free list, Modified list
 Round Robin: Employed by Short-term Scheduler
 Shortest Job First (SJF): Print queue
 Shortest Remaining Time (SRT): variation of SJF
 Aging
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Process Scheduling (cont’d)
Scheduler is invoked under these circumstances.
• System Event Occurs: Short-term Scheduler or Medium-term
Scheduler
• Quantum expires: Short-term Scheduler
• Perform wait service: Short-term or Medium-term Scheduler
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Memory Management
 Demand paged virtual memory system: Mitigates shortcomings of
partitioned memory
 Process has a virtual address on creation
 Process and Physical Memory divided into pages of 512 bytes in
size.
 Mapping : Virtual address translated to physical address
 Translation-not-valid Exception
 Principle of Locality – Active pages
 Working set (Resident Set): set of active pages, LRU algorithm with
reference bit, size varies
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Memory Management (cont’d)
 Memory Management Subsystem
• Page Fault handler
• Moves pages from disk to the resident set
• Local page replacement strategy
• Page management algorithm
• Swapper
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•
•
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Lack of physical memory for new processes
Whole idle process is swapped: Swap File
Page File: Modified pages
HIB state until awakened
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Page Management Algorithm
Copyright © 1997 by Butterworth-Heinemann
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Page Management Algorithm (cont’d)
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Page Management Algorithm (cont’d)
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Process Data Structures
 Process Context
• Software Context: Process Control Block (PCB)
• Name, state, priority, event flags
• Links for the linked lists
• House keeping fields: block type, length
• Pointers to JIB and PHD
• Asynchronous System Trap (AST) Control Block
• Software Context: Job Information Block (JIB)
• Represents the tree structure forming the parent and
child processes
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Process Data Structures (Cont’d)
 Hardware Context: Process Header (PHD): includes hardware PCB
• Resident set of processes
• P0 and P1 page tables
• Hardware PCB: stacks, registers, base and length registers
 Virtual address space: S0, P0,P1 regions
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Memory Management Data Structure
VAX Address Format
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Memory Management Data Structure (cont’d)
VMS Page Table Entry
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Memory Management Data Structure (cont’d)
Original table © 1997 by Butterworth-Heinemann
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Process Synchronization
 Synchronization between two processes
• Hibernate – Wake: System services
• Event Flag: Set Event Flag, Clear Event Flag, Wait For Event Flag
• Mailbox: I/O between processes
 Mutual Exclusion of Critical Region
• Lock and Unlock system service: Semaphore
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VMS: Advantages and Disadvantages
o Advantages
• ‘One architecture, one operating system’
• VAX implementation of peer-to-peer relationship
o Disadvantages
• Totally a CISC architecture and prominence of RISC
architecture
• VAX assembly language
• Flaw in the implementation of IPL
• Poor management of the problem of critical selection
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VMS: Advantages and Disadvantages (Cont’d)
o Future…
• OpenVMS
• DEC Alpha
• HP’s systems with Intel’s new 1.5 GHz Itanium 2 chips:
rx4640, rx7620, rx8620
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