Chapter 2 - Computer System Structures
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Transcript Chapter 2 - Computer System Structures
Computer System Structures
disk
CPU
disk
disk
controller
printer
printer
controller
tape
tape
tape-drive
controller
System bus
memory controller
memory
Interrupts
Signal sent to the CPU by hardware or
software
Hardware triggers an interrupt when an
event occurs
Software triggers an interrupt when a
system call is performed
–
This is often called a trap
How Interrupts Work
When interrupt occurs, the current program
stops execution
The interrupt service routine is executed
When routine is finished, the current
program resumes
This is much like a function call except it is
done by the hardware
Interrupt Service Routine
Each device does something different when
interrupted
Each device must have a different interrupt
service routine
A table of interrupt service routines is kept
by the hardware. This table is called the
interrupt vector and is indexed by the
interrupt number
Interrupt Occurs
Current program stops
Using the interrupt
number, the starting
address of the ISR is
found in the IV by
indexing with the
interrupt number
The ISR executes
When ISR completes,
the current program
continues execution
Interrupts: Priorities
An interrupt may occur when and ISR is
executing.
Each interrupt has a priority, and the highest
priority interrupt continues
If an interrupt interrupts another ISR,
information must be placed on a stack so
execution can continue when ISR finishes
Interrupts: Enable and Disable
If disabled, the current ISR cannot be
interrupted
If enabled, the current ISR is interrupted if
the interrupt has a higher priority than the
current interrupt
Modern Operating Systems
Interrupt driven
If there is nothing to
do, the OS waits
When an event occurs,
the OS is interrupted
and the event is
handled
When a system call is
done, a trap occurs
The proper system
routine is executed
Control is then
returned to the routine
that called the system
routine
I/O Structure
When a routine needs I/O, a system call is done
The OS consults the device status table to get the
device’s types, address, and state
The device status table is updated to indicate the
I/O needed
When the I/O is completed, the OS is interrupted
and control returns to the user
DMA Transfer
Some devices maintain a buffer where the
data is kept
The OS must copy the buffer when
complete or I/O can’t continue
It would be better if the device could put the
data directly into memory
DMA Transfer (cont.)
CPU
Memory
I/O instructions
I/O devices
DMA Transfer (cont.)
Data is placed directly in memory
This is done using cycle stealing
–
–
The DMA controller steals memory cycles from
the CPU
This can slow down the CPU because it may
have to wait to get data from memory
Storage Structure
Registers - associated with CPU
Cache - intermediate between CPU and memory
Main memory - where CPU obtains data
Secondary storage - permanent storage capacity
–
–
–
Disks - large capacity
Tapes - larger capacity
CDs - only readable
Disk
Track
Platter
Sector
Hardware Protection
Dual-Mode operation
I/O protection
Memory protection
CPU protection
Dual-Mode Operation
Provides hardware support for two modes:
–
–
User mode - execution is done in behalf of a
user
Monitor mode (supervisor mode or system
mode) - execution is done in behalf of the OS
This insures that programs can’t do things
they shouldn’t
Dual-Mode Operation (cont.)
Mode bit indicates which mode CPU is in
When an interrupt or trap occurs, hardware
switches to monitor mode
When interrupt or trap is finished, hardware
switches to user mode
Privileged instructions can only be issued in
monitor mode
I/O Protection
All I/O instructions are privileged
instructions
This insures that a user can’t execute
instructions that could mess up the machine
Memory Protection
OS must keep users within their own
memory
This is done using two registers:
–
–
Base register - start of the user’s memory
Limit register - size of the user’s memory
A checks is done by the hardware that
insures that every memory access is inside
the user’s memory space
CPU Protection
Timer - interrupts CPU after a specified
period to insure the OS maintains control
–
–
Timer is decremented every clock tick
When timer reaches zero, an interrupt occurs
Timer is used for time sharing
Timer is used to compute the current time
Load-timer is a privileged instruction