Transcript 1.01 - Fordham University

CISC 3595 Operating Systems
Introduction
Tuesday / Friday 10:00-11:15am
X. Zhang
Four Components of a Computer System
People,
machines,
other
computers
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CPU,
memory,
I/O devices
What is an Operating System?
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A program that acts as an intermediary between a
user of a computer and the computer hardware
Operating system goals:
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Execute user programs and make solving user problems
easier
Make the computer system convenient to use
Use the computer hardware in an efficient manner
Computer System Organization
One or more CPUs, device controllers connected
through common bus providing access to shared
memory
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A quick tour of computer hardware
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Basic Elements
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Processor
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Instruction Execution
Interrupts
The Memory Hierarchy
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Cache Memory
I/O Communication Techniques
Basic Hardware Elements
Processor or Central Processing Unit (CPU)
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Controls operation, performs data processing
Memory (main/primary memory)
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Volatile, i.e., data is typically lost when power is removed
Used to store data and instructions
I/O Modules: disk controller, USB controller, ...
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Moves data between computer and external device such as
storage (e.g. hard drive), communication equipment, terminals
System Bus
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Wires or backplane connecting CPUs, I/O modules and main
memory
Top-Level Logic View
Main memory:
a large array of words or
bytes. Each words has its
own address.
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Roadmap
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Basic Elements
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Processor
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Instruction Execution
Interrupts
The Memory Hierarchy
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Cache Memory
I/O Communication Techniques
Processor (CPU)
CPU: the physical heart of
entire computer system
ALU: Arithmetic Logic Unit
Registers
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Singleprocessor & Multiprocessor
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Most systems use a single generalpurpose processor
Multiprocessors systems growing
in use and importance
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parallel systems, tightly-coupled
systems
Advantages include
1. Increased throughput
2. Economy of scale
3. Increased reliability – graceful
degradation or fault tolerance
Processor Registers
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Storage in CPU; Faster and smaller than main memory
Data/Address registers
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Storing data or memory address
Store frequently used variable in register:
for (register int i = 0; i < bufsize; i++) * p++ = assigned_val;
Control and status registers
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Used to control CPU operation
Ex: Program counter (PC), Instruction register (IR),
Ex: Program status word (PSW): contain bits set by processor
hardware as a result of operations
 e.g., to denote an exception (arithmetic operation
overflow…)
Roadmap
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Basic Elements
Processor Registers
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Instruction Execution
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Interrupts
The Memory Hierarchy
Cache Memory
I/O Communication Techniques
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Instruction Execution
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A program: a sequence of instructions stored in memory
(main memory or disk)
To run a program, it needs to be loaded (from disk) into
main memory
Basic Instruction Execution cycle:
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Processor reads (fetches) instruction from main memory
Processor executes the instruction
Stored program computer (due to John von Neumann (1903-1957))
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Instruction Fetch and Execute
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Program counter (PC)
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holds address of the instruction
to be fetched next
Processor fetches the
instruction from memory, &
increments PC
Fetched instruction is loaded
into instruction register (IR)
Decoded, and executed by ALU
if it’s an arithmetic and logic
operation
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Machine Code
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Instruction set: the set of machine instructions that a
processor can execute
Main categories of machine instructions
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Processor-memory: move data between memory and
processor
processor-I/O: move data between peripheral device and CPU
Data processing: arithmetic or logic operation on data
Control: alter execution sequence (jump, if and loop structure)
Machine code and Assembly Language
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Process only understands binarys => machine
instructions are coded in binary strings
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Assembly language: mnemonic language (helping to
remember)
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e.g., 10110000 01100001 (Hexadecimal: B0 61)
MOV AL, #61h
Move the value 61h (or 97 decimal; the h-suffix means
hexadecimal; the pound sign means move the immediate value,
not location) into the processor register named "AL".
If a certain process supports 50 different instructions,
how many bits are needed to represent the type of the
instruction ?
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Considering a Hypothetical Machine
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So far so good
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We learnt how a program is executed by CPU: follow the
instructions (program)
Now think about the following simple program:
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To read two integers from standard input, add them and print
the result on the display
How to do I/O?
Wait ? Too wasteful of processor resource
Also not fair if multiple users are working on the
computer (such as our storm server)
Need some way to interrupt current program execution
to give CPU to other user program or to handle I/O
response
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Roadmap
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Basic Elements
Processor Registers
Instruction Execution
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Interrupts
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The Memory Hierarchy
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Cache Memory
I/O Communication Techniques
Interrupts
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A mechanism to interrupt normal sequencing
One goal: to support interrupt-I/O that improve process
utilization
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Most I/O devices are slower than CPU => inefficient for
processor to wait for I/O to complete
With Interrupt mechanism:
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CPU can execute other process/job after issuing I/O command
I/O module generates an interrupt to notify CPU about
completion of the I/O operation or failure.
Transfer of Control
via Interrupts
Interrupt Handler:
Predefined routines
to be called when
a certain interrupt
occurs.
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Simple Interrupt Processing
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Different Types of Interrupts
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Program: arithmetic overflow, division by zero, illegal
machine instruction, reference outside of user’s allowed
memory space, also called exception, trap or
software interrupt
Timer: generated by a timer with CPU
I/O: generated by I/O controller to signal completion of
operation or error condition
Hardware failure: triggered by power failure, memory
parity error…
An operating system is interrupt driven.
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Multiprogramming
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Single program cannot keep CPU and
I/O devices busy
Multiprogramming organizes programs
so CPU always has one to execute
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Multiple programs(jobs) is kept in memory
One program is selected and run via job
scheduling
When it has to wait (for I/O for example),
OS switches to another job
After an interrupt handler completes, control
may not return to the program that was
executing at the time of the interrupt
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Roadmap

Basic Elements
Processor Registers
Instruction Execution
Interrupts
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The Memory Hierarchy
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Cache Memory
I/O Communication Techniques
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Main (Primary) Memory
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Main memory – the only large storage media that
CPU can access directly
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Capacity:
Bandwidth
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Peak: one word per bus cycle
Local bus, i.e., system bus
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Secondary Storage
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Hard disk: extension of main
memory that provides large
nonvolatile storage capacity
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disk controller: determines
logical interaction between the
device and the computer
Performance measure
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Maximum transfer rate: 66Mb/s
Spindle Rotation Speed: decides the
reading/writing rate
Seek time: avg time to locate the
data
Why so many different memory/storage
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Major constraints in memory
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Amount
Speed
Expense
Generally:
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Faster access time, greater cost per bit
Greater capacity, smaller cost per bit
Greater capacity, slower access speed
Memory Hierarchy
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Major constraints in memory
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Amount
Speed
Expense
Going down hierarchy
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Decreasing cost per bit
Increasing capacity
Increasing access time
Decreasing frequency of access
Auxiliary memory
External and nonvolatile
Used to store program and data files
Performance of Various Levels of
Storage
< 16 GB
ns: nanosecond (10-9 seconds), 1 billionth second
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Caching is everywhere
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Caching: information in use is copied from slower
and larger storage to faster and smaller storage
(cache) temporarily
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Faster storage (cache) checked first to determine if
information is there
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If it is, information used directly from the cache (fast)
If not, data copied to cache and used there
Caching is performed at many levels in a computer
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Hardware: L1 cache
Operating system: disk cache
Software/application level caching
Primary Cache (L1 cache)
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Processor must access memory at least once per
instruction cycle
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Storage on CPU for temporary storage of instructions
and data.
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Processor speed faster than memory access speed
fastest form of storage. (on-the-chip with a zero wait-state
(delay) interface to the processor's execution unit,)
Exploit locality with a small fast memory
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Data which is required soon is often close in memory to the
current data
Temporal locality and spatial locality
Primary Cache and Main Memory
• Cache contains copy of a portion of main memory
• Processor first checks cache
•If not found, block of memory read into cache
• Because of locality of reference, likely future memory references are
in that block
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Roadmap

Basic Elements
Processor Registers
Instruction Execution
Interrupts
The Memory Hierarchy
Cache Memory

I/O Communication Techniques
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Input/Output Device Controller
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Each is in charge of a particular type of device
Execute concurrently with CPU
Responsible for I/O operation: moving data between the
device and the controller’s local buffer
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I/O Techniques
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When CPU encounters an instruction relating to I/O,
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it executes that instruction by issuing a command to the
appropriate I/O module
Three techniques are possible for I/O operations:
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Programmed I/O
Interrupt-driven I/O
Direct memory access (DMA)
Programmed I/O
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The I/O module performs the requested action
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then sets the appropriate bits in the I/O status register
but takes no further action to alert the processor.
As there are no interrupts, CPU must determine when
I/O is complete
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Wait instruction idles CPU until the next interrupt
At most one I/O request is outstanding at a time, no
simultaneous I/O processing
Programmed
I/O Example
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Data read in a word at a time
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Processor remains in status-checking loop
while reading
Interrupt-driven I/O
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When CPU encounters an I/O related instruction
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it executes that instruction by issuing a command to appropriate
I/O module
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After I/O starts, control returns to user program
without waiting for I/O completion
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After I/O device controller finish I/O operation, it generate
an interrupt to inform CPU
CPU, in the interrupt handler, read the data from device
controller or write next block of data to device controller
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Wake up processes waiting for the interrupt...
Direct Memory Access (DMA) I/O
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DMA: allow device to access memory for reading and/or
writing independently of CPU.
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DMA module (DMA device controller)
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Used in high-speed I/O devices: disk controllers, graphics
cards, network cards and sound cards
Transfers blocks of data from buffer storage directly to main
memory
Only one interrupt is generated per block
CPU only involved at beginning and ending transfer.
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Less CPU intervention => much more efficient in terms of
processing times
DMA I/O: How does it work?
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When needing to read/write processor
issues a command to DMA module
with:
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Whether a read or write is requested
Address of the I/O device involved
Starting location in memory to read/write
Number of words to be read/written
How a Modern Computer Works
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