Transcript Computer Network and Infrastructure

IT206 Operating Systems
Introduction
Dr. E.C. Kulasekere
University of Moratuwa
IT206 Operating Systems
Chapter 1 Expectations
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Computer system overview.
Basic elements of ….
Registers.
Functions of an OS related to computer system.
Interrupts.
I/O Communication.
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What is an Operating System?
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Exploits the hardware resources of one or more processors
Provides a set of services to system users
Manages secondary memory and I/O devices
Provides a user friendly environment for computing.
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Operating System Definitions
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Resource allocator – manages and allocates resources.
Control program – controls the execution of user programs and
operations of I/O devices .
Kernel – the one program running at all times (all else being
application programs).
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What is a Computer System?
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Ensemble of hardware components.
Interconnection and communication infrastructure.
Provides functionality to execute programs.
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Computer System Components
1. Hardware – provides basic computing resources (CPU, memory,
I/O devices).
2. Operating system – controls and coordinates the use of the
hardware among the various application programs for the
various users.
3. Applications programs – define the ways in which the system
resources are used to solve the computing problems of the
users (compilers, database systems, video games, business
programs).
4. Users (people, machines, other computers).
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Abstract View of Computer System
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Operating System History
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Computer Components: Top-Level
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User Visible Registers
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May be referenced by machine language
Available to all programs - application programs and system
programs
Types of registers
 Data
 Address
 Index
 Segment pointer
 Stack pointer
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User Visible Registers (Cont …)
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Address Registers
 Index
 involves adding an index to a base value to get an
address
 Segment pointer
 when memory is divided into segments, memory is
referenced by a segment and an offset
 Stack pointer
 points to top of stack
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Processor Registers
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User-visible registers
 Enable programmer to minimize main-memory references by
optimizing register use
Control and status registers
 Used by processor to control operating of the processor
 Used by operating-system routines to control the execution
of programs
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Control an Status Registers
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Program Counter (PC)
 Contains the address of an instruction to be fetched
Instruction Register (IR)
 Contains the instruction most recently fetched
Program Status Word (PSW)
 condition codes
 Interrupt enable/disable
 Supervisor/user mode
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Instruction Cycle
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Fetch and Execute Cycle
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The processor fetches the instruction from memory
Program counter (PC) holds address of the instruction to be
fetched next
Program counter is incremented after each fetch
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Instruction Register
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Fetched instruction is placed in the instruction register
Types of instructions
 Processor-memory
 transfer data between processor and memory
 Processor-I/O
 data transferred to or from a peripheral device
 Data processing
 arithmetic or logic operation on data
 Control
 alter sequence of execution
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Example Execution
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Direct Memory Access (DMA)
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I/O exchanges occur directly with memory
Processor grants I/O module authority to read from or write to
memory
Relieves the processor responsibility for the exchange
Processor is free to do other things
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Interrupts
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An interruption of the normal sequence of execution
Improves processing efficiency
Allows the processor to execute other instructions while an I/O
operation is in progress
A suspension of a process caused by an event external to that
process and performed in such a way that the process can be
resumed
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Types of Interrupts
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Program
 arithmetic overflow
 division by zero
 execute illegal instruction
 reference outside user’s memory space
Timer
I/O
Hardware failure
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Transfer of Control Via Interrupts
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Usage of Interrupts
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To improve the processing efficiency.
Manage the I/O instruction sequence with non I/O instruction
sequences.
Release resources from a system that is hung up.
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Interrupt Handler
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A program that determines nature of the interrupt and performs
whatever actions are needed
Control is transferred to this program
Generally part of the operating system
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Interrupt Handler
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Interrupt Processing
Interrupt
processing
pp. 21-25
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Interrupt Cycle
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Processor checks for interrupts
If no interrupts fetch the next instruction for the current program
If an interrupt is pending, suspend execution of the current
program, and execute the interrupt handler
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Multiple Interrupts
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Disable interrupts while an
interrupt is being processed
 Processor ignores any new
interrupt request signals
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Multiple Interrupts: Sequential Order
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Disable interrupts so processor can complete task
Interrupts remain pending until the processor enables interrupts
After interrupt handler routine completes, the processor checks
for additional interrupts
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Multiple Interrupts: Priorities
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Higher priority interrupts cause lower-priority interrupts to wait
Causes a lower-priority interrupt handler to be interrupted
Example when input arrives from communication line, it needs
to be absorbed quickly to make room for more input
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Rationale Behind Multiprogramming
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Interrupts increase the efficiency of the processor by allowing
multiple tasks which may not be sequential in order
However if the time required for I/O operations is longer than the
user operation (this is the true case) the processor will be idle
for a long time.
Multiprogramming which has more than one process in the
memory solves this. Which means multiple user programs are
now available for task switching.
A proper process mix will further enhance the CPU and I/O
hardware utilization.
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Multiprogramming
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Processor has more than one program to execute
The sequence the programs are executed depend on their
relative priority and whether they are waiting for I/O (with
multiple interrupts only)
After an interrupt handler completes, control may not return to
the program that was executing at the time of the interrupt
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Multiprogrammed Batch System
Several jobs are kept in main memory at the same time, and the
CPU is multiplexed among them.
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Memory Hierarchy
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Going Down the Hierarchy
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Decreasing cost per bit
Increasing capacity
Increasing access time
Decreasing frequency of access of the memory by the
processor
 locality of reference
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Disk Cache
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A portion of main memory used as a buffer to temporarily to
hold data for the disk
Disk writes are clustered
Some data written out may be referenced again. The data are
retrieved rapidly from the software cache instead of slowly from
disk
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Cache Memory
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Invisible to operating system
Increase the speed of memory
Processor speed is faster than memory speed
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Cache Memory
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Contains a portion of main memory
Processor first checks cache
If not found in cache, the block of memory containing the
needed information is moved to the cache.
2 n addressable words each having a
If the main memory has 2^n
unique n-bit address.
For mapping the main memory is considered to have fixedlength blocks of K words each. That is the main memory has
M=2^n/K such blocks.
Cache consists of C sots of K words each (C<<M).
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Cache/Main Memory System
pg. 32 Para 2.
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Cache Design
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Cache size
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small caches have a significant impact on
performance
Block size
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the unit of data exchanged between cache and main
memory
hit means the information was found in the cache
larger block size more hits until probability of using
newly fetched data becomes less than the probability
of reusing data that has been moved out of cache
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Cache Design
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Mapping function
 determines which cache location the block will occupy
Replacement algorithm
 determines which block to replace
 Least-Recently-Used (LRU) algorithm
Write policy
 When the memory write operation takes place
 Can occur every time block is updated
 Can occur only when block is replaced
 Minimizes memory operations
 Leaves memory in an obsolete
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Cache Read Operation
Explain the
speed up of a
newly loaded
program using
this figure
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Techniques for I/O Operations
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Programmed I/O
Interrupt-Driven I/O
Direct Memory Access
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Programmed I/O
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A user program coming across an I/O
command will issue a command to the
appropriate module for servicing.
I/O module performs the action, not the
processor
Sets appropriate bits in the I/O status
register and does not interrupt the processor
to alert it has finished processing.
Processor checks status periodically until
operation is complete
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Problems with Programmed I/O
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Processor has to pole the IO module repeatedly checking the
status bit.
The performance of the processor is degraded with the polling
operation.
The processor is responsible for extracting data from main
memory for output and storing data in main memory for input.
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Interrupt-Driven I/O
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Processor is interrupted when I/O module
ready to exchange data
Processor is free to do other work
No needless waiting
Consumes a lot of processor time because
every word read or written passes through
the processor
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Problems with Interrupt-Driven I/O
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Interrupt driven I/O is more efficient than programmed I/O,
however it still requires the active intervention of the processor
for data transfer.
We know that the processor speeds are far greater than the I/O
speeds which will make this intervention of processor
inefficient.
Further there will be an instruction overhead since when the
processor is tied up in managing a I/O transfer, a number of
instructions must be executed for each I/O transfer.
Hence systems such as DMA should be used which does not
use the processor.
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