Transcript Slides - Agenda INFN

Frontier Detectors for Frontier Physics - 12th Pisa Meeting on Advanced Detectors
La Biodola, Isola d’Elba, May 20-26, 2012
THE ALICE SILICON
TRACKER UPGRADE
Petra Riedler (CERN) on behalf of the ALICE Collaboration
Outlook
2

ALICE ITS upgrade proposal
Physics motivation
 Design goals and requirements
 Layout
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Technologies and R&D
Timeline
Summary
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
ALICE Silicon Tracker Upgrade
3
ALICE upgrade proposal

V. Manzari – “Performance and future plan of the ALICE experiment”
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run at high rate (50
kHz Pb-Pb) with
minimum bias readout
Improve vertexing and
tracking at low pT
Upgrade Silicon
Tracker as one of
the key detectors
in ALICE
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Motivations for Tracker Upgrade
4
Key physics topics:
 Thermalization of heavy quarks in QGP
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Measure baryon over meson ratio (LC/D or LB/B)
Measure elliptic flow of charmed hadrons (LC, ..)
Quark mass dependence of energy loss in QGP
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Test colour and mass dependence of the interaction (heavy quarks)
Study separately nuclear modification factor RAA of D and B mesons down
to low pT
Particle
Decay Channel
c (m)
D0
K +
(3.8%)
123
D+
K + + (9.5%)
312
DS+
K+ K + (5.2%)
150
LC+
p K + (5.0%)
60
P. Riedler - 12th Pisa Meeting on Advanced Detectors
D0 K- +
May 20-26, 2012
Present ITS
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6 layers of silicon detectors
(pixels, drift, strips)
PID (drift and strips)
Low material budget: 1.14 % X0
per pixel layer, 7.2 % X0 for ITS
L0 at 3.9 cm from IP
Impact parameter resolution
Limitations:
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charm difficult for pT0
(background is too large)
resolution not sufficient for charmed
baryons (Lc c=1/2 D0=1/5 D+)
Lc impossible in Pb-Pb collisions , at
the limit in pp (only high pT)
Lb impossible in Pb-Pb collisions
(insufficient statistics and resolution)
B/D separation difficult, especially
at low pt (e PID + vertexing)
indirect B measurement via
electrons
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Tracker Upgrade Design Goals
6
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Improve impact parameter resolution by a factor of ~3
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High standalone tracking efficiency and pt resolution
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Increase granularity
Increase radial extension
Fast readout
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Get closer to IP
Reduce material budget
Reduce pixel size
Readout of Pb-Pb interactions at 50 kHz and pp interactions at 2MHz
Fast insertion/removal for yearly maintenance
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Possibility to replace non functioning detector modules during yearly winter
shutdown
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Tracker Upgrade Geometry
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Beampipe outer radius: r=17.2 mm
(presently 29.8 mm)
First layer at 22 mm (presently 39 mm)
Radial coverage up to 430 mm (500
mm will increase DpT by ~10%)
7 layers (presently 6)
|h|<1.22 over 90% of the luminous
region (presently 0.9)
P. Riedler - 12th Pisa Meeting on Advanced Detectors
Layer
Radius [cm]
+/- z
1
2.2
11.2
2
2.8
12.1
3
3.6
13.4
4
20
39.0
5
22
41.8
6
41
71.2
7
43
74.3
May 20-26, 2012
Tracker Upgrade Requirements
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Targets for Inner Layers (1, 2, 3)
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rf & z spatial precision: 4-6 m
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Targets for Outer Layers (4, 5, 6, 7)
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Pixel size (rf , z): 20-30, 20-50
m
Material budget per layer: 0.30.5% X0
Radiation env: 700 krad/ 1013
neq per year
Granularity: 80 cm-2 particle
density
rf spatial precision: 20 m
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Larger pixel size
Strip pitch 95 um, stereo angle 35
mrad
Material budget per layer: 0.50.8% X0
Radiation env: 10 krad/ 3*1011
neq per year
Granularity: 1 cm-2 particle density
Low cost per m2
Low power budget: 0.25-0.5 W/cm2
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Layout Options
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A. 7 layers of monolithic pixel detectors
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Better standalone tracking efficiency and transverse momentum
resolutions
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Worse PID or no PID
B. 3 layers of pixel detectors + 4 layers of strip detectors
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Worse standalone tracking efficiency and pt resolution
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Better PID
Option B
4 layers of strips
Option A
7 layers of
pixels
3 layers of
pixels
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Performance
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Fast simulation tool originally developed by STAR HFT.
Layout A (7 pixel layers)
srf = 4 µm
sz=4 µm
X/X0
0.3 %
Layout B (3 pixel + 4 strip layers)
srf = 4 µm (pixel),
20 µm (strips)
sz=4 µm (pixel),
830 µm (strips)
X/X0
0.3% (pixel),
0.8 % (strips
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Performance
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Tracking efficiency
Momentum resolution
Layout A (7 pixel layers)
Layout B (3 pixel + 4 strip layers)
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Pixel Technologies
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Hybrid pixels
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Separate optimization of sensor and circuitry, complex
in-pixel signal processing
State-of-the-art detectors but are limited to inner
layers due to their cost
Charge collected by drift
Proven radiation resistance to ALICE levels
Monolithic pixels
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Sensing layer (~1kOhmcm) is integrated into the
CMOS chip
Have shown significant progress in recent years and
will soon be installed in STAR (HFT)
Charge mainly collected by diffusion (though some new
developments on the way)
Radiation resistance needs to be proven
P. Riedler - 12th Pisa Meeting on Advanced Detectors
Figure - Rossi, L., Fischer, P., Rohe, T. & Wermes, N. (2006).
Berlin: Springer.
May 20-26, 2012
Figure Stanitzki, M. (2010). Nucl. Instr.
and Meth. A
doi:10.1016/j.nima.2010.11.166
Pixel Assembly
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Light weight, compact module design, reducing insensitive areas at the edges
minimizing overlap regions.
Hybrid pixels
Monolithic pixels
100 µm
50 µm
50 µm
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Monolithic Pixel R&D
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MISTRAL development for ALICE (MIMOSA type)
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Rolling shutter readout (following development for STAR HFT)
0.18 m technology node
 Radiation tolerance improvement by factor 10x
Double-sided readout
 Reduction of integration time down to 20-40 s target
 Double power consumption (more columns active at the same time) MIMOSA32
Prototypes in 0.18 µm CMOS:
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MIMOSA32 (delivered spring 2012)
ALICE_ITS_TJ180_T1 test chips (expected June 2012)
 Evaluation of the technology
 Test of radiation hardness, SEU sensitivity
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
SEU test-chip
MonolithicPixel R&D
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INMAPS process: extension (deep p-well) of a triplewell 0.18 m CMOS process developed by RAL in
collaboration with foundry
New development dedicated to ITS upgrade started in
2012 (ARACHNID Collaboration)
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INMAPS prototype tests for ALICE:
Irradiation tests of basic test structures (transistors w/o
deep p-well and different epi layers) starting May 2012
Le Pix: pixel detectors integrating readout and detecting elements with 90
nm CMOS technology on moderate resistivity wafers
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Operated with reverse bias up to 100V (collection by drift)
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Low power consumption (signal processing at end of column
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First samples tested in testbeam, test in lab ongoing
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Thinning and Assembly Tests
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Thinning:
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8” wafer 50 µm thick
13 blank wafers thinned to 50 microns and
diced
Assemblies used for dummy modules
In preparation: thinning of patterned 8”
wafers (daisy chain structure for electrical
connection tests) and CMOS wafers
Assembly tests:
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Flex cable designed with daisy chain to test
interconnection
Study of different glues ongoing
First dummy module assembled using blank
dies (50 µm) and kapton flex
Assembly of dummy module
Hybrid Pixel R&D
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Development with IZM Berlin to
produce hybrid pixel detector with
50 µm chip and 100 µm sensor
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Tests with dummy components using
ALICE SPD layout
2 ladders (5 chips + 1 sensor) and 8
singles with final thicknesses bonded
and delivered
Tuning of process ongoing
Participate in TSV studies with
Medipix
Study of edgeless sensors:
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SEM image of hybrid assembly
before carrier release
50 um chip
100 um sensor
Using epitaxial and standard FZ
wafers (FBK and VTT)
SEM image of hybrid assembly
Silicon Strip R&D
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Sensor design based on current ALICE SSD
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Reduced strip length down to 20 mm
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Standard 300 m double-sided micro-strip sensors
768 strip/side, 35 mrad stereo angle
Half cell-size: 95 m x 20 mm
 Higher granularity
 Better ghost hit rejection
Doubled channel density
 Challenging interconnection layout
 Power consumption
New ASIC design:
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0.18 m technology (rad. hard)
Low power and fast ADC (10 bits)
Preserve 20 MIP range and 0.1 MIP resolution
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Timeline
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The ITS upgrade targets the shutdown in 2018:
 Until end 2014: R&D
Finalisation of specifications
 Evaluation of technologies using prototypes
 Selection of technologies and and full validation of
prototypes
 Final design and validation
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2015/16: production, construction and test of modules
2017: assembly and pre-commisioning in clean-room
2018: installation in ALICE
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Summary
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
The ALICE Silicon Tracker Upgrade will allow to address new physics topics
like:
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Quark mass dependence of in-medium energy loss
Thermalization of heavy quarks in the medium
New Tracker composed of 7 silicon layers characterized by:
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Impact parameter resolution improved by factor 3x
First detecting layer @20 mm from the beam line
Material budget x/X0 ~ 0.3-0.5 % in the first layers
High standalone tracking efficiency down to low pt (> 95% for pt > 200 MeV/c)
PID capability
Fast access for maintenance
Detector technology evaluation ongoing - To be built and installed by 2018
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
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Backup Slides
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Monolithic Pixels (IPHC)
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CMOS sensors with rolling-shutter readout architecture
MIMOSA series for STAR
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Continuous charge collection (mostly by diffusion) inside the pixel
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Pixel matrix read periodically row by row: column parallel
readout with end of column discriminators
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Charge collection time ~200 ns
Integration time  readout period ~100 s
Low power consumption: only one row is powered
at time: (150-250 mW/cm2)
Pixel size 20 m
Total material budget x ~ 0.3% X0
0.35 m technology node
ULTIMATE sensor for STAR HFT
P. Riedler - 12th Pisa Meeting on Advanced Detectors
May 20-26, 2012
Strip detector development
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Interconnections
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Microcables in aluminum-polyimide
Thickness: 10 m + 10 m
Pitch: 42.5-44.5 m (chip) / 47.5 m (sensor)
Length: ~ 25 mm / ~ 50 mm
Assembly and folding
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TAB bonding technique:
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allows chip tests, less material, safe folding
Bonding windows facing sensor/chip
Different hybrid layouts for P/N side being designed
ASIC functionalities
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0.18 m technology (rad. hard)
Low power and fast ADC (10 bits)
Preserve 20 MIP range and 0.1 MIP resolution
Preliminary Studies on Mechanical Structure
Several concepts are being studied
STAR PXL detector centered
in the Middle Support Cylinder
single end support allows
rapid insertion and removal
ALICE New ITS
Ultra-Light Concept
ALICE New ITS
Clam-shell Concept
Cooling and support mechanics
strongly coupled
The present ITS parameters
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Accurate description of
the material in MC
G. Contin - Univ. & INFN Trieste (I)
26/03/2012