Transcript lecture-01 - VLSI Systems Lab

1 Motivation and Objectives
Contents
1. Historical Perspective
1) Change of Human Life & Major Industry
2) History of IC Development
3) Korean History
2. Role of IC’s in present & future
3. SIA Technology Roadmap
4. Future Challenges
1.1
1. Historical Perspective
1) Change of Human Life & Major Industry
Phase I
?
Phase Duration(years)
I
II
III
104~103
(several
thousand years)
Phase II
?
Major Industry
Achievement
Activity Domain
Hunting, Fishing
Feeding
raw material(m)
Cattle Breeding
Stable Feeding
domesticated m
Agriculture
Stable Feeding
domesticated m
103~102
Machinery
Mass Production
(several
hundred years) Chemistry, Nuclear Environment Pollution
102~ ?
(several
ten years?)
Phase III
Electronics
Information
Control, Computing
and Communication
m deformation
(with energy)
new material
& new energy
Information,
idea
1.2
Questions thereof
 Between phase I&II, how much mass is needed to store/produce some
energy, E ?
2
E = mc (Einstein)
 Between phase II&III, the question is, how much energy is needed to
store/transmit/transform some information, I ?
E = ln I(Shannon)
 What is the bottleneck(most limiting resource) in information age,
among(Mass, Energy and Idea) ?
I = exp(energy, mass, or population)
“Amount of information is proportional to exp(population), and so is
value of idea. Probability of coming up with the best idea is
exp-1 (population).”
1.3
2) History of IC Development
 Mechanical Computing Device
1642, Pascal : Counter Wheel Calculator for(+, -)
1671, Leibniz : Counter Wheel for(+, -) and Chain & Pulley for(  , )
1823, Babbage : Difference Engine for Table Construction using Finite
Difference
1834, Babbage : Analytical Engine performing four operations,
conditional branch.
data
Mill
(ALU)
Store
(Counter Wheels)
Card
Punch
instructions
Operation Cards
(+, -,  , )
Variable Cards
Program
1.4
 Electromechanical Computing Device(magnetic relay & wheels)
1941, Zuse : first operational general-purpose computer
1944, Aiken : Harvard Mark I(3 sec for 10-digit multiplication)
 Electronic Computers(vacuum tubes)
1943-1946, Maughly & Eckert : ENIAC(for computing artillery trajectory)
– 18,000 tubes, 30 tons
– decimal(rather than binary) computing using one hot coding
(10 vacuum tubes for one digit number)
– reliability, power consumption problems
1.5
 Bipolar Transistor
before 1947 : semiconductor used only for thermistors, photodiode, and
rectifiers
1948, Bardeen & Brattain : point-contact transistor
1949, Schockley : Junction diode and Bipolar Junction Transistor(BJT)
theory published
 MOSFET(IGFET, MISFET)
1930, Lilienfeld & Heil : proposed the principle
1960, Kahng(강 대원) & Atalla : first demo. of MOSFET
(Silicon planar process)
 Logic gate
1956, Harris : bipolar digital logic gate
1960, Fairchild, Inc : commercial logic gate IC(Fairchild Micrologic)
1962, Beeson : TTL(Transistor-Transistor Logic)
1974, Masaki : ECL(Emitter-Coupled Logic)
1972, Hart : I2L(Integrated-Injection Logic)
1.6
 Microprocessor & Memories(Technology Leader & Champion Product)
1972, Intel : 4004 microprocessor
Voyager 탐사선(1980년 이전 발사)
1974, Intel 8080
1970, Hoff : 4 kbit MOS memory
 CMOS technology

Weimer patent on CMOS flip-flop(1962 filed-1965 issued)

Wanlass(Fairchild) Patent on CMOS concept & inverter, NAND and NOR
gates

CMOS initially used only for low-power applications such as wrist watch
chip, due to process & area overhead

CMOS acceptance widened as VLSI era comes in to solve the power
consumption problem.
 Others : BiCMOS, GaAs, SiGe, Superconducting, etc.
1.7
3) Korean IC History
 ~ 1960 : Signetics, Fairchild, Motorola Korea, Anam : IC assembly
 1972 : 한국반도체(부천:강기동사장) by Applewine Paradise, Inc.

Sold to Samsung in 1976 ; Produced CMOS Watch Chips
only LP appl. at that time
 ~ 1970 : KIST 반도체장치실(김만진박사) ; moved to 구미, KIET in 1978(?)
 1975 : KAIST 반도체연구실(김충기교수) 발족
 1976 : 대한전선 반도체 사업 투자 ; sold to 금성반도체 ; merged KIET facility in
Kumi in 1980(?)
 1983. 12 : Samsung developed 64K DRAM with Micron’s mask
 1985 : Hyundai joined DRAM race with 삼성, LG
 1993-1995 : All three highly profitable due to good DRAM market.
 1995/2H : DRAM price fall begins.
 Now : System industries as well as semiconductor industries rely on non-memory
IC for their future.
1.8
2. Role of IC’s in Present & Future
 Product value is mostly increased by putting more idea, rather than
mass, or energy, recently.
 mass
 idea
 energy
 자동차 기술(연료소모량) : 약 100년간 20배 향상

100년 전 : 1Km/liter
now : 20Km/liter
 Battery( charge storage efficiency ) : 5 - 8 fold improvement in 200 years

200 years ago : 25 W.H/Kg (Lead)

30 years ago : 50 W.H/Kg (NiCd)
125 W.H/Kg (Alkaline)

10 years later : 200 W.H/Kg (Lithium Polymer)
1.9
 Semiconductor IC technology

CPU speed : 100-fold increase in 10 years

Memory storage density : 4-fold increase in every 3 years
 IC is the most efficient means for the storage(memory),
processing(ASIC, processor), and transmission(communication chip)
of information.
 Ever more intelligence is being put into almost all things :

Car : from mechanical stuff, to a system with various control, computing,
communication occurring within .

Building : from a chunk of steel-concrete, to a system with various control,
computing, communication occurring within.

People : equipped with various monitoring, computing, communicating
and actuating device connected via wireless human body network(?)
MICROS
1.10
 IC performs information processing being connected with other IC’s
through interconnection within a Board, and possibly running
software downloaded from a memory module.
Board
CHIP #2
CHIP #1
CHIP #3
Memory (SW)
1.11
IC Design Environment
System Specification & Verification
Interconnection
IC ( Hardware )
CAD
Software
Library
Device & Int. model
Process Integration
Material Lithography
1.12
3. 1997 SIA Technology Roadmap
 Semiconductor Industry Association initiative
 version 1992, 1994 & 1997
 objective :
Setting up goals for the future work and effort of each technologist(equipment
manufacturer, material provider, process integration experts, CAD & test expert, etc)
to maintain the growth rate based on Moore’s law.
 Seven Focus TWG’s







Design & Test
Process Integration, Device &
Structures
Front End Process
Lithography
Interconnect
Factory Integration
Assembly & Packaging
 From Cross-out TWG’s




ESH(Environment, Safety and
Health)
Defect reduction
Metrology
Modeling & Simulation
1.13
Roadmap Technology Characteristics 1/4
2 yrs.
3 yrs.
Year
1997
1999
2001
2003
2006 2009
DRAM Half-pitch(nm)
250
180
150
130
100
70
50
MPU Gate Length(nm)
200
140
120
100
70
50
35
DRAM samples
256M
1G
DRAM production
DRAM bits/cm2
High-Vol. Logic transistors/cm2
ASIC Usable transistors/cm2
64M 256M
1G
4G
16G 64G
256G
1G
4G
64G
4G
96M 270M 380M 770M 2.2B 6.1B
3.7M 6.2M 10M
8M
14M
16M
2012
17B
18M
39M 84M 180M
24M
40M 64M 100M
1.14
Roadmap Technology Characteristics 2/4
Year
1997 1999 2001 2003 2006 2009 2012
Number of Chip I/O’s( high perf.)
1450
2000
2400
3000
4000 5400 7300
Number of Chip I/O’s( low cost)
800
975
1195
1460
1970 2655 3585
Number of Package Pins/Balls(P)
600
810
900
1100
1500 2000 2700
Number of Package Pins (ASIC)
1100
1500
1800
2200
3000 4100 5500
On-chip local clock(MHz)
750
1250
1500
2100
3500 6000 10000
Chip to board(off-chip) clock(MHz)
reduced-width, multiplexed bus
750
1200 1400 1600 2000 2500 3000
Chip to board(off-chip) clock(MHz)
peripheral buses
250
480
785
885
1035 1285 1540
1.15
Roadmap Technology Characteristics 3/4
Year
1997 1999 2001 2003 2006 2009 2012
Chip Size(DRAM) mm2
280
400
445
560
790
1120
1580
Chip Size(Microprocessor) mm2
300
340
385
430
520
620
750
Chip Size(ASIC)[max litho field ]
480
800
850
900
1000
1100
1300
Lithographic Field Size(mm2)
Maximum Number Wiring Levels
22x22 25x32 25x34 25x36 25x40 25x44 25x52
484
800
850
900 1000 1100 1300
6
6-7
7
7
7-8
8-9
9
1.16
Roadmap Technology Characteristics 4/4
Year
1997
1999
2001
2003
2006
2009
2012
Minimum mask count
22
22/24
23
24
24/26
26/28
28
Substrate Diameter(mm)
Bulk or epitaxial or SOI wafer
200
300
300
300
300
450
450
Power Supply, Vdd(V)
18 inch !
1.8-2.5 1.5-1.8 1.2-1.5 1.2-.15 0.9-1.2 0.6-0.9 0.5-0.6
Max. Power High-performance
with heat sink(W)
70
90
110
130
160
170
175
Max Power
Battery(W)--(Hand-held)
1.2
1.4
1.7
2.0
2.4
2.8
3.2
1.17
Resources for addressing the Roadmap(ex:litho.)
Year
pitch(nm)
Solutions
Risk
1997
250
1999
180
2001
150
DUV
DUV
DUV
existing
limited
2003
130
2006
100
EUV, E-beam, Ion-beam
Prox. X-ray
few
moderate
no known
high
Industry internal
industry coop.
R&D
fund
sematech
SRC & university
Federal program
production integration development
focus centers
research
1.18
4. Grand Challenges
 Ability to continue scaling according to Moore’s law
( new material, technologies, approaches must be invented )
 Lithography below 100nm

No materials exist that are optically transparent for  <= 193nm
through-the-lens exposure scheme impossible
totally new scheme needed
 New materials and structures



high conductivity interconnection (copper)
low- dielectric
good contact material
similarly for packaging
 GHz frequency operation

10 GHz :  = 3cm comparable to chip size (treating circuit & packaging as
a whole)
 Metrology and test
 R & D challenge (due to down-sizing)
1.19
1시간의
가 치
바쁘고 피곤하게 보낸 하루 끝에
남은 1시간을 주시하고
자신을 위해 투자하라.
성공자와 실패자의 차이는
그 1시간에 대한 태도에 달렸다.
1.20