Transcript CS 211: Computer Architecture

CS 6461: Computer Architecture
Fall 2013
History and Trends
Instructor: Morris Lancaster
Instructor
• Morris Lancaster
– 703 400 6408
– [email protected]
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CS 6461 History and Trends
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Computer Architecture
Instruction Set Architecture
Refers to the instruction set that can be used by the
programmer or generated by a compiler
This logical view serves as the boundary between
hardware and software
Can be compared with an interface specification or
contract for an object – where given a set of
preconditions, a given activity will always yield the
same postconditions with respect to the architecture
View as the accessible register set and memory and the
instructions that can be used to affect them
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Computer Architecture
Organization
High level aspects of computer design, including memory
system, bus structure, design of the internal cpu,
independent of the ISA.
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Computer Architecture
• Organization
– Processors with two distinct organizations can support
the same ISA
• NEC VR 5432 and VR 4122 both support MIPS 64 ISA
• VR 4122 does floating point in software and has different
cache and pipeline than VR 5432
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Computer Architecture
• Hardware
– The specifics of a machine’s detailed logic design and
packaging
• Clock rates, voltages, etc.
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Trends in Technology, Applications and
Architectures
Historical Perspective
• 1957 to early 1970s
– Technology improvements:
• tubes to transistors to integrated circuits
– Organization improvements:
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Larger register sets
Increased number of buses
Introduction of caches
Introduction of pipelines
– Mainframes and minicomputers dominated the market
– “Big fish ate little fish”
– 25% to 30% per year performance growth contributed to by
technology improvements and organization improvements
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Historical Perspective
• Late 1970’s through early 1980’s
– Technology improvements:
• LSI to VLSI to not categorizing any more
• Facilitated 35% or more growth per year
– Organization improvements:
• Few new improvements so as to have less impact than
technology
– Microprocessor based systems began to take over
– “little fish eat big fish?”
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Historical Perspective
Why microprocessor systems flourished
• Fundamental changes in software development
and development environments
– Assembly language development virtually eliminated, and
therefore applications became ISA (object code) independent
(Intel’s/IBM’s lesson with 8080 and 8086)
– Standard OS (varieties of UNIX, Linux)
• Manufacturing costs were lower
– The life cycle for design and development (and cost recovery) of
microprocessors was shorter, so improvements could be made
quicker to produce higher performance processors
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Historical Perspective
Why microprocessor systems flourished
• Users could afford the new systems, especially
those users with limited or no access to the
corporate or university mainframe
• Given the fast turnaround for new designs and
ISA independence, experimentation with new
architectures was facilitated
– Reduced Instruction Set Computer architectures
developed
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Historical Perspective
Advances in Computer Organization Begin Again
• RISC
– Exploitation of instruction level parallelism
• Initially through pipelining and later through multiple instruction
issue
– The use of caches
• Initially simple and later more complex
– Intel IA 32 (x86) Architecture goes RISC
• IA 32 instructions translated internally to RISC-Like instructions
• As transistor counts per chip soared this translation cost became
negligible
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Historical Perspective
Advances in Computer Organization Begin Again
• Technology improvements continued and the combination
of the technology and organization enhancements has led
to 20 years of sustained growth in performance at an
annual rate of over 50%. Organization enhancements have
been the more significant portion of this growth.
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Historical Perspective
Performance
?
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Historical Perspective
Chip Transistor Count
Sun Niagra 16 core and
IBM Power 7 8 core (both 2 billion trans)
Intel 2 Billion Transistor 2008 (Article)
Intel 1 Billion Transistor 2006
From Stallings, Computer Organization and Architecture – 8th Edition
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Evolution
• Wide range of applications of computing
– Desktop computing – business
• Now Workstations are on the Desktop
– High performance workstations
– Servers
• Minicomputers replaced by microprocessors acting as
servers
– Supercomputers
• Built from large numbers of microprocessors
– Embedded computers
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The Designer’s Challenges
• Rate of change of technology
– Integrated circuit logic technology
• Transistor density increases at about 35% per year
• Increases in die size about 10% to 20% per year (better yields)
• Combined effect of about 55% per year increase in transistor
count per chip
– DRAM
• Density increases of 40% to 60% per year
– Magnetic Disk Technology
• Greater than 100% per year
– Network Technologies
• 10Mbps to 100Mbps to Gigabit
• Greater connectivity
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Design Requirements/Constraints for
Computer Architectures
Requirements
• Who will program the machines
• What do they expect?
– Performance?
– Low power consumption?
• How?
– HLL, embedded, etc
• Compilation is key to performance
– HW/SW interaction at ISA level
– Knowledge of architecture, application and algorithms
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The Designer’s Challenges
what are the real requirements?
• Which of these has the best performance?
Airplane
Passengers
Boeing 737- 100
101
Boeing 747
470
BAC/Sud Concorde
132
Douglas DC-8-50
146
Range (mi) Speed (mph)
630
598
4150
610
4000
1350
8720
544
How much faster is the Concorde compared to the 747? <2.213>
How much bigger is the 747 than the Douglas DC- 8? <3.5606>
bigger? faster? greatest range?
What is the passenger mph ratio of the 747 compared to the
Concorde?<?>
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Industry Challenge
• Delays in delivery of a new technology can
severely impact market position
• Life cycle for a particular product less than 5 years
(e.g. Pentium II, Pentium III, Pentium IV)
• Cost
• Inventory risk.
• Other notes:
– In 2004 Intel cancelled all its high performance
uniprocessor projects and joined IBM and Sun in
declaring that the road to higher performance would be
in multiple processors per chip.
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Focus of Text
• Look at the factors that made the last century’s
incredible growth rate possible
– Architectural ideas
– Accompanying compiler improvements
• Look at
– Reasons for change
– Challenges and initial promising approaches
– Compilers
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Defining Computer Architectures
• Determine what attributes are important for a new
computer
• Design the computer to maximize performance while
staying within cost, power and availability constraints.
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Instruction set design
Functional organization
Logic design
Implementation
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IC design
Packaging
Power
Cooling
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Instruction Set Architecture
• 7 Dimensions
– Class of ISA
• Register-memory
• Load-store
• Others
80x86
MIPS
– Stack
– Memory Addressing
• Byte or word addressing
• Alignment
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Instruction Set Architecture
• 7 Dimensions (continued)
– Addressing Modes
• Register, immediate, displacement – MIPS
• Add another displacement, register – older mainframe
– Operand Size
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8 bit
16 bit
32 bit
64 bit
IEEE 32 bit single precision and 64 bit double precision,
also 80 bit extended version
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Instruction Set Architecture
• 7 Dimensions (continued)
– Operations
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Data Transfer
Arithmetic/Logical
Control
Floating Point
– Control flow
• Conditional branches, unconditional jumps, procedure
calls, returns
– ISA encoding
• Fixed length
• Variable Length
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Instruction Set Architecture
MIPS
• MIPS Instruction subset on Page 11
MIPS Formats Figure 1.6
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What Remains?
• Designing the organization and hardware to meet
goals and functional requirements
– Organization – high level aspects of a computer’s
design
• CPU Design
• Memory Design and Interconnect
• ISA x86 AMD Opteron and Pentium 4 have very different
internal designs
– Hardware – specifics, detailed logic design and
packaging
• Pentium 4 versus Mobile Pentium 4
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Cost of an Integrated Circuit
• Cost of integrated circuit
Cost of die + cost of testing die + cost of packaging and final test
die yield
• Cost of die
Cost of Wafer
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Dies per wafer * die yield
• Dies per wafer
π * (wafer diameter/2)2
die area
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- π * wafer diameter
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2*die area
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Die Wafer
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Cost of an Integrated Circuit
• Die yield
.4 to .8 in 2001
Wafer yield * ( 1 + Defects per unit area * Die area )-α
α
A parameter that corresponds
inversely to the number of masking levels
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Measuring and Reporting Performance
• Performance = 1 / Response time
• Machine X is n times faster than machine Y
Performance X
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Performance Y
=
Response time Y
Response time X
=n
• Example,
– Machine X runs a program in 10 sec
– Machine Y runs the same program in 15 sec
– 15 / 10 = 1.5  X is 1.5 times faster than Y
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Quantitative Performance
• Amdahl’s Law
speedup =
Performance for entire task using enhancement when possible
Performance for entire task without using the enhancement
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Quantitative Performance
• A program is broken down into instructions
• Each instruction takes multiple clock cycles
# of instructions
Time/program
=
# of clocks
*
a program
second
*
# of instructions
clock
= instruction count * CPI / clock rate
• Instruction count (instructions executed, not static code)
– Mostly determined by compiler and ISA
• CPI (average clock per instruction)
– Mostly determined by ISA and CPU organization –CPI’s may differ according
to instruction –
• Clock rate
– Mostly determined by technology and CPU organization
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Quantitative Principles
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Take advantage of parallelism
Understand Amdahl’s Law
Principle of Locality
Focus on the Common Case – make it fast
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