Transcript slides
8th European Workshop on Microelectronics Education – EWME‘2010
Darmstadt, May 10-12, 2010
E-Learning Environment
for WEB-Based Study of Testing
R.Ubar1, A.Jutman1, J.Raik1,
S.Kostin1, H.-D.Wuttke2
Department of Computer Engineering
1Dept. of Computer Engineering Tallinn University
2Dept.
of Technology
of Technical Informatics
Estonia
Tallinn University of Technology
Technical University of Ilmenau
Estonia
Germany
Motivation
ITRS: semiconductor test is already one of key problems
in current generation of VLSI chips and its importance
will be growing
There is a strong demand for well-educated specialists in
the area of IC and microelectronics testing
Interactive training tools as addendum to LMS are needed
to facilitate teaching process
TUT has a 15 years tradition in developing training tools
in microelectronic testing
Students develop the software themselves under
supervision of graduate students and senior personnel
EWME May 10–12, 2010
E-Learning Environment for WEB-Based Study of Testing
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8th European Workshop on Microelectronics Education – EWME‘2010
Motivation
Cutting Edge Research
−Needs custom developed algorithms
and/or tools
PhD Students
−Need to run their experiments
Undergraduate Students
−Need introduction to the topic
Department
−Needs training materials and research
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8th European Workshop on Microelectronics Education – EWME‘2010
Outline
Different layers of the platform
HW tools
PC-based tools
Web interface
E-Learning tools
Conclusions and discussion
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
Main components of the platform
DefSim - an integrated
measurement environment for
physical defect study in CMOS
circuits.
TurboTester – a research and
training toolkit with extensive
set of tools for digital test and
design for testability
Web-based runtime interface
for remote access to our tools
Java applets – illustrative
e-learning software written
specifically for the web
Other tools
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
Defect Study using DefSim
DefSim is an integrated circuit
(ASIC) and a measurement
equipmrnt for experimental study of
CMOS defects.
The central element of the DefSim
equipment is an educational IC with
a large variety of shorts and opens
physically inserted into a set of
simple digital circuits.
The IC is attached to a dedicated
measurement box serving as an
interface to the computer. The box
supports two measurement modes voltage and IDDQ testing.
http://www.defsim.com
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8th European Workshop on Microelectronics Education – EWME‘2010
DefSim IC details
− Standard industrial CMOS
technology
− Area 19.90 mm2
− Approx. 48000 transistors
− 62 pins
− JLCC68 package
A built-in current monitor
for IDDQ testing is
implemented in each block.
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8th European Workshop on Microelectronics Education – EWME‘2010
Implementation of defects
NAND2 cell with floating gate
VDD
Q
A
X
B
GND
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8th European Workshop on Microelectronics Education – EWME‘2010
Implementation of defects
NAND2 cell with D-S short (missing poly)
VDD
Q
A
• AltogetherBthere are over 500
different defects on the chip
• Implemented defects are GND
shorts
and opens in metal and poly layers
• To be close to the silicon reality
each cell is loaded and driven by
standard non-inverting buffers
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8th European Workshop on Microelectronics Education – EWME‘2010
DefSim in the classroom
With DefSim you can
Observe the truth table of correct circuit
Observe the truth table of defective circuit
Obtain defect/fault tables for all specific
defects
Define test patterns automatically or manually
Activate IDDQ and voltage measurements
Study behavior of bridging and open faults
Study and compare different fault models
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8th European Workshop on Microelectronics Education – EWME‘2010
DefSim lab environment
“Plug and Play” – dedicated hardware and software
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
PC-Based Toolkit – Turbo Tester
Multivalued
Simulator
Specification
Faulty
Area
Test
Generators
Design
BIST
Emulator
Design Error
Diagnosis
http://www.pld.ttu.ee/tt
Test
Set
Test Set
Optimizer
Hazard
Analysis
Data
Logic
Simulator
Fault
Simulator
Defect
Library
Fault
Table
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Used in 100+ institutions in 40+ countries
8th European Workshop on Microelectronics Education – EWME‘2010
PC-Based Toolkit – Turbo Tester
Formats:
EDIF
AGM
Specification
Faulty
Area
Levels:
Gate
Macro
RTL
Algorithms:
Deterministic
Random
Genetic
Circuits:
Combinational
Sequential
Test
Generators
Design
BIST
Emulator
Design Error
Diagnosis
Methods:
BILBO
CSTP
Hybrid
http://www.pld.ttu.ee/tt
Test
Set
Test Set
Optimizer
Multivalued
Simulator
Hazard
Analysis
Data
Logic
Simulator
Fault
Simulator
Fault
Table
Defect
Library
Fault models:
Stuck-at faults
Physical defects
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Used in 100+ institutions in 40+ countries
8th European Workshop on Microelectronics Education – EWME‘2010
Turbo Tester: Basic Facts
Freeware
Downloadable via the Web
Windows, Linux, UNIX/Solaris
EDIF design interface
ATPGs, BIST, simulators, test
compaction
Provides homogeneous environment
for research and training
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
BIST Analyzer: covered topics
Test Pattern Generators
(PRPG):
− LFSR
− Modular LFSR
− Cellular Automata
− GLFSR
− Weighted TPG
− etc.
Combined Techniques
(PRPG + Memory):
− Reseeding
− Multiple polynomial BIST
− Hybrid BIST
− Bit-Flipping BIST
− Column matching BIST
− etc.
Typical BIST Architecture
Test Pattern
Generator
(PRPG)
BIST
Control
Unit
Circuit Under
Test (CUT)
BIST
Memory
........
........
Output Response
Analyzer (MISR)
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8th European Workshop on Microelectronics Education – EWME‘2010
BIST Analyzer: covered topics
•Embedded generators (PRPG) and their
properties
•PRPG optimization methodologies and
algorithms
•Combined BIST solutions
(PRPG+memory)
•Fault detection and diagnosis in BIST
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8th European Workshop on Microelectronics Education – EWME‘2010
BIST Analyzer
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
Web Interface
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8th European Workshop on Microelectronics Education – EWME‘2010
Different layers of the platform
Web
Tools
PC
Tools
Hardware
Tools
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8th European Workshop on Microelectronics Education – EWME‘2010
E-Learning software on DFT
http://www.pld.ttu.ee/applets
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8th European Workshop on Microelectronics Education – EWME‘2010
Benefits of e-learning software
Essential supplement to the university
lectures
Accessibility over Internet
Visual content (“Living Pictures”)
Comprehensive examples
Better organization of teaching materials
Based on free educational software
Distance learning & computer aided
teaching
Easy to implement in other universities
Constantly updated
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8th European Workshop on Microelectronics Education – EWME‘2010
Turbo
Tester
Java
Applets
E-Learning Software
Web based tools for classroom, home and exams
Tools for laboratory research
Scenario
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Learning
Scenario
Scenario
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Test
Scenario
Error
Scenarios
Built-Infor
Generation
Design
Diagnosis
Self-Test
Testability
Test
Generation
Scenario
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Supporting
Scenario
Scenario
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Scenario
Test
Error
Materials
Built-Infor
Generation
Design
Design for
Testability
Turbo
Tester
Diagnosis
Self-Test
Testability
Test and
Diagnostics
RTL Design
and Test
Boundary
Scan
Error
Diagnosis
Built-In
Self-Test
Applet on Basics
of Test &
Diagnostics
Schematic
& DD Editor
Applet on RTL
Design and
Test
Applet on
Boundary Scan
Standard
Group of Applets
on Control Part
Decomposition
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8th European Workshop on Microelectronics Education – EWME‘2010
E-Learning Software
Software for classroom, home, labs and exams:
Logic level diagnostics
System level test & DfT
Boundary Scan
http://www.pld.ttu.ee/applets
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8th European Workshop on Microelectronics Education – EWME‘2010
Applet on basics of test
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manual test pattern generation assisted by the applet
generation of pseudo-random test vectors by LFSR
fault simulation & study of fault table
combinational fault diagnosis using fault tables
sequential fault diagnosis by guided probing
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8th European Workshop on Microelectronics Education – EWME‘2010
Applet on RT-level design and test
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design of a data path and control path (microprogram) on RT level
investigation of tradeoffs between speed of the system & HW cost
RT-level simulation and validation
gate-level deterministic test generation and functional testing
fault simulation
logic and circular BIST, functional BIST, etc.
design for testability
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8th European Workshop on Microelectronics Education – EWME‘2010
Applet on Boundary Scan
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Simulation of operation of TAP Controller
Illustration of work of BS registers
Insertion and diagnosis of interconnection faults
Design/editing of BS structures using the BSDL language
Design/description of the target board using several chips
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8th European Workshop on Microelectronics Education – EWME‘2010
Schematic and DD editor
Design for
Main functions of the applet are:
Testability
• gate-level schematic editor
• SSBDD editor
• schematic ↔ SSBDD on-the-fly
converter
AGM,
• different format reader/converter GIF
Applet on
Basics of Test
& Diagnostics
AGM, DWG
Schematic
& DD Editor
AGM, GIF
Applet on
RTL Design
and Test
An applet targeted
at binding all the
applets and the
Turbo Tester
AGM
Applet on
Boundary Scan
Standard
Supported
interface
formats are:
AGM
DWG
VHDL
GIF
EDIF?
PostScript?
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8th European Workshop on Microelectronics Education – EWME‘2010
Example of a lab work scenario
XTimport Tool
Circuit
Netlist
Report
File
Design
Specification
ATPG
Design
Implementation
Test Vector File
Prediag
Tool
Verification
Results
Intermediate
Diagnosis
Verification Tool
Human Being
Diagnostic
Vectors
Turbo Tester
tools and formats
Other
Circuit
Schematic
Final
Diagnosis
Test Vector File
Vecmanager
Tool
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8th European Workshop on Microelectronics Education – EWME‘2010
Conclusions
The main features of the platform:
•Research engine + training software
•Layered structure
•HW and SW components
•Remote access
•Distance learning and e-learning
•Computer-aided teaching
•Freeware
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8th European Workshop on Microelectronics Education – EWME‘2010
Conclusions
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8th European Workshop on Microelectronics Education – EWME‘2010
Our Tools on the Web
The Turbo Tester home page
http://www.pld.ttu.ee/tt/
The Turbo Tester web-server page
http://www.pld.ttu.ee/webtt/
DefSim home page
http://www.defsim.com
Java applets home page
http://www.pld.ttu.ee/applets/
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