Transcript Chapter 1
Chapter 1
Computer Abstractions
and Technology
Progress in computer technology
Makes novel applications feasible
Underpinned by Moore’s Law
§1.1 Introduction
The Computer Revolution
Computers in automobiles
Cell phones
Human genome project
World Wide Web
Search Engines
Computers are pervasive
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Classes of Computers
Desktop computers
Server computers
General purpose, variety of software
Subject to cost/performance tradeoff
Network based
High capacity, performance, reliability
Range from small servers to building sized
Embedded computers
Hidden as components of systems
Stringent power/performance/cost constraints
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What You Will Learn
How programs are translated into the
machine language
The hardware/software interface
What determines program performance
And how the hardware executes them
And how it can be improved
How hardware designers improve
performance
What is parallel processing
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Understanding Performance
Algorithm
Programming language, compiler, architecture
Determine number of machine instructions executed
per operation
Processor and memory system
Determines number of operations executed
Determine how fast instructions are executed
I/O system (including OS)
Determines how fast I/O operations are executed
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Application software
Written in high-level language
System software
Compiler: translates HLL code to
machine code
Operating System: service code
§1.2 Below Your Program
Below Your Program
Handling input/output
Managing memory and storage
protection & sharing resources
Hardware
Processor, memory, I/O controllers
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Levels of Program Code
High-level language
Assembly language
Level of abstraction closer
to problem domain
Provides for productivity
and portability
Textual representation of
instructions
Hardware representation
Binary digits (bits)
Encoded instructions and
data
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The BIG Picture
CPU
Storage devices
Control
Data path
§1.3 Under the Covers
Components of a Computer
Cache and RAM
Hard disk, CD/DVD, flash
Input/output includes
User-interface devices
Display, keyboard, mouse
Network adapters
For communicating with
other computers
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Components of the Apple iPad 2
capacitive multitouch
screen and LCD
display
3.8 V, 25 watt-hour, polymer
battery, which consists of three
Li-ion cell cases
Front and back facing camera,
headphone jack & microphone
metal frame
volume control, screen
rotation, gyroscope
and Accelerometer
Logic (mother) board
speaker assembly
Wi-Fi, Bluetooth, and FM
tuner
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The logic board of Apple iPad 2
Apple A5 chip, which contains dual ARM processor cores that run at 1
GHz as well as 512 MB of main memory inside the package
The similar sized chip to the left is the 32 GB flash memory chip for
non-volatile storage. There is an empty space between the two chips
where a second flash chip can be installed to double storage capacity.
The chips to the right of the A5 include power controller and I/O
controller chips
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The processor integrated circuit inside the
12.1*10.1 mm A5 package
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Abstractions
The BIG Picture
Abstraction helps us deal with complexity
Instruction set architecture (ISA)
Hide lower-level detail
The hardware/software interface
Application binary interface (ABI)
The ISA plus system software interface
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A Safe Place for Data
Volatile main memory
Loses instructions and data when power off
Non-volatile secondary memory
Magnetic disk
Flash memory
Optical disk (CDROM, DVD)
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Networks
Communication and resource sharing
Local area network (LAN): Ethernet
Within a building
Wide area network (WAN): the Internet
Wireless network: WiFi, Bluetooth
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Technology Trends
Electronics technology continues to evolve
Increased capacity and performance
Reduced cost
Year
Technology
Relative performance/cost
1951
Vacuum tube
1965
Transistor
1975
Integrated circuit (IC)
1995
Very large scale IC (VLSI)
2005
Ultra large scale IC
1
35
900
2,400,000
6,200,000,000
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Chip manufacturing process
8–12 inches in diameter
and 12–24 inches long
0.1 inches thick
1 layer of transistors with
2-8 levels of metal
conductor, separated by
layers of insulators
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Response Time and Throughput
Response time
How long it takes to do a task
Throughput
Total work done per unit time
response time and throughput affected by:
e.g., tasks/transactions/… per hour
Replacing the processor with a faster version
Adding more processors
We’ll focus on response time for now…
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Relative Performance
Performance = 1/Execution Time
“X is n time faster than Y”
Performanc e X Performanc e Y
Execution time Y Execution time X n
Example: time taken to run a program
10s on A, 15s on B
Execution TimeB / Execution TimeA
= 15s / 10s = 1.5
So A is 1.5 times faster than B
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Measuring Execution Time
Elapsed time
Total response time, including all aspects
Processing, I/O, OS overhead, idle time
Determines system performance
CPU time
Time spent processing a given job
Discounts I/O time, other jobs’ shares
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CPU Clocking
Operation of digital hardware governed by a
constant-rate clock
Clock period
Clock (cycles)
Data transfer
and computation
Update state
Clock period: duration of a clock cycle
e.g., 250ps = 0.25ns = 250×10–12s
Clock frequency (rate): cycles per second
e.g., 4.0GHz = 4000MHz = 4.0×109Hz
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CPU Time
CPU Time CPU Clock Cycles Clock Cycle Time
CPU Clock Cycles
Clock Rate
Performance improved by
Reducing number of clock cycles
Increasing clock rate
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CPU Time Example
Computer A: 2GHz clock, 10s CPU time
Designing Computer B
Aim for 6s CPU time
Can do faster clock, but causes 1.2 × clock cycles
How fast must Computer B clock be?
Clock Cycles B 1.2 Clock Cycles A
Clock Rate B
CPU Time B
6s
Clock Cycles A CPU Time A Clock Rate A
10s 2GHz 20 109
1.2 20 109 24 109
Clock Rate B
4GHz
6s
6s
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Instruction Count and CPI
Clock Cycles Instructio n Count Cycles per Instructio n
CPU Time Instructio n Count CPI Clock Cycle Time
Instructio n Count CPI
Clock Rate
Instruction Count for a program
Determined by program, ISA and compiler
Average cycles per instruction
Determined by CPU hardware
If different instructions have different CPI
Average CPI affected by instruction mix
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CPI Example
Computer A: Cycle Time = 250ps, CPI = 2.0
Computer B: Cycle Time = 500ps, CPI = 1.2
Same ISA
Which is faster, and by how much?
CPU Time
CPU Time
A
Instructio n Count CPI Cycle Time
A
A
I 2.0 250ps I 500ps
A is faster…
B
Instructio n Count CPI Cycle Time
B
B
I 1.2 500ps I 600ps
B I 600ps 1.2
CPU Time
I 500ps
A
CPU Time
…by this much
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CPI in More Detail
If different instruction classes take different
numbers of cycles
n
Clock Cycles (CPIi Instructio n Count i )
i1
Weighted average CPI
n
Clock Cycles
Instructio n Count i
CPI
CPIi
Instructio n Count i1
Instructio n Count
Relative frequency
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CPI Example
Alternative compiled code sequences using
instructions in classes A, B, C
Class
A
B
C
CPI for class
1
2
3
IC in sequence 1
2
1
2
IC in sequence 2
4
1
1
Sequence 1: IC = 5
Clock Cycles
= 2×1 + 1×2 + 2×3
= 10
Avg. CPI = 10/5 = 2.0
Sequence 2: IC = 6
Clock Cycles
= 4×1 + 1×2 + 1×3
=9
Avg. CPI = 9/6 = 1.5
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Performance Summary
The BIG Picture
Instructio ns Clock cycles
Seconds
CPU Time
Program
Instructio n Clock cycle
Performance depends on
Algorithm: affects IC
Programming language: affects IC
Compiler: affects IC
Instruction set architecture: affects IC, CPI
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§1.6 The Sea Change: The Switch to Multiprocessors
Uniprocessor Performance
Constrained by power, instruction-level parallelism,
memory latency
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Multiprocessors
Multicore microprocessors
More than one processor per chip
Requires explicitly parallel programming
Traditional instruction level parallelism
Hardware executes multiple instructions at once
Hidden from the programmer
New parallelism challenges:
Parallel Programming
Task scheduling
Load balancing between the cores
Reducing communication and synchronization overhead
between cores
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Cost/performance is improving
Hierarchical layers of abstraction
The hardware/software interface
Execution time
In both hardware and software
Instruction set architecture
Due to underlying technology development
§1.9 Concluding Remarks
Concluding Remarks
the best performance measure
Power is a limiting factor
Use parallelism to improve performance
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