Transcript Document

Design and Fabrication of Silicon Solar Cells
Electrical Engineering: Ahmed Jama and Alan Blaisdell
Advisor: Prof. M.G. Guvench
Top View
Solar Cell Testing
Solar Cell
Cross Section
Photons
Metal Contact
The wafer is divided into four solar cells. Each cell has
a different finger spacing. The bottom cell has a
medium spacing and was calculated to be the most
efficient. The solar simulator should verify the
calculation.
P+Boron Diffusion
N- Epi-Layer
Solar simulator
Anti-reflection
layer
(SiO2/TiO2)
V
N+ Substrate
Back Contact (Aluminum)
Cell Fabrication
Vacuum Deposition System
Evaporation system forms thin film of
metal on both surfaces of the solar cell.
Curve Tracer
This low-cost solar simulator was
developed at USM and used for
performance evaluation tests of
Solar Cells.
4-Point Probe Meter
Used to display I-V
characteristics of the junction
Probe Station
Diffusion Furnace
The furnace at 1050 oC oxidizes the
wafers to insulate different layers as
well as junction diffusion
Used for measuring Sheet
Resistance to determine metal
htickness
Used for surface observation
and probe alignment for
Capacitance measurement
Abstract: The purpose of this project is to make Solar Cells from four-inch Silicon wafers. This is a part of an effort to recycle the test wafers
used in the semiconductor (integrated circuit chip) fabrication at the local foundries like Fairchild Semiconductor and National Semiconductor to
turn them into solar cells. In this project four-inch diameter silicon wafers donated by Fairchild to the Microelectronics Laboratory of Prof.
Guvench are being processed, involving Boron and Phosphorus diffusion, antireflective coating design and application and aluminum/nickel
metallization. Special metal patterns are being designed for optimum solar energy to electricity conversion.