Transcript SAM7L Technical Overview

AT91SAM7L
Technical Overview
Outlines
Introduction
Power Supply Considerations
Clock Considerations
Supply Controller
Peripherals
Memory Mapping / Boot
AT91SAM7L-EK
AT91SAM7L-STK
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AT91SAM7L
Introduction
Low-Power Applications
Static and dynamic power consumption lowered to a
minimum
Performance scaling allows consuming only when
required
Backup while entering sleep modes
Reduced number of external devices simplifies the
designs
In many low-power applications, operating from
1.8V to 3.6V, the MCU is in sleep mode for the
majority of the time, waking up periodically to an
event
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Low-Power Applications
Need an MCU with
 Short wake-up time to guarantee fast response
time to events
 Flexible clock management
 Increased number of low power modes
Segment LCD is often expected as User
Interface
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AT91SAM7L Featured for Low Power
Enable portable devices to derive power from a
dual-cell battery providing a true dual-cell battery
system solution
Capable of operating down to 1.8V
Use innovative design techniques
 To deliver a typical OFF-mode current of 100nA and a
typical WAIT-mode current of 9µA
 To enable integration resulting in fewer external
components and reduced BOM cost
 To Wake-up from its low power WAIT-mode with the CPU
operating at 2MHz within just 6µs
 To save battery life in active mode thanks to powerefficient architecture ACTIVE-mode current as low as
0.5mA/MHz
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AT91SAM7L provides
longer battery life and lower
overall system cost in
dual-cell modes!
Innovative Design Techniques
Sub 0.18µm technology for high
performance and low dynamic power
consumption
Power switching
Voltage scaling
Clock switching
Cell libraries, Zero POR, BOD and Voltage
Regulator designed for minimum leakage
current
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AT91SAM7L Applications
Well-suited for products powered by userreplaceable batteries such as:
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Calculator/translator
ZigBee and Wireless modules
Medical/Healthcare/Fitness
Remote Control
Toys
Audio players
PDA, GPS,voice recorders
Watches
Sensors
PC Wireless peripherals
House control
Mobile Accessories
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AT91SAM7L Block Diagram
Microcontrollers
AT91SAM7L64
AT91SAM7L128
JTAG
Boundary Scan
System Peripherals
AIC
1.8V
PIOA/B/C
Voltage
PDC
Regulator
DBGU
LCD
Voltage
Regulator
LCD
Charge
Pump
Segment
LCD
Controller
JTAG ICE
ARM7TDMI
ROM
WDT
SRAM
PIT
2KB (Backup)
4KB (Core)
Flash
IAP
64-128kB
FFPI
SAM-BA Boot
RC OSC
2MHz
40
segments
X
10
Terminals
Package
QFP128
BGA144
Key Features
PCK-MCK 37MHz
PLL
Single Supply
AMBA System Bus
Power On Reset
PMC
BOD
POR
RSTC
RTC
RC OSC
32kHz
Peripheral Bridge
APB
Dual Internal RC
Programmable
Brownout
I/O 1.8V or 3.3V
Peripheral DMA
Controller: 11 channels
Security Bit
Supply
Contr
XTAL
32kHz
Backup Unit
PDC
ADC
x4
PDC
PWM
x4
I/O
x80
16-bit
Timer
x3
PDC
PDC
SPI
TWI
USART
PDC
USART
User Peripherals
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AT91SAM7L Performance
Low power design with the right performance
 Maximum operating frequency
- Industrial worst case, 3.0V: 37 MHz
- Industrial worst case, 1.8V: 30 MHz
 128-bit Flash Access
- Single cycle random Flash access up to 17MHz
- Zero wait state Flash in sequential accesses
- Page Programming time 4.6ms max (auto-erase included)
 Peripheral DMA controller unlocks processor performance
for the application
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AT91SAM7L
Power Supply Considerations
Power Supplies
 Seven types of power supply pins
 VDDIO1 pin
- Main regulator Input, Power all the PIOC I/O lines: 1.8V-3.6V
 VDDOUT pin
- Main regulator Output: 1.35V-1.8V
 VDDCORE pin
- Power the logic, the PLL, the Fast RC Osc, ADC and Flash: 1.35V1.8V
 VDDLCD pin
- LCD regulator Input. Voltage ranges 2.5V-3.6V.
 VDDIO2 pin
- LCD regulator output. Power LCD and PIOA and PIOB I/O lines
 VDDINLCD pin
- Charge pump Input: 1.8V-3.6V
 VDD3V6 pin
- Charge pump Output: 3.6V
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Single Power Supply System
Directly powered from batteries
 Usage of the embedded charge pump and LCD
voltage regulator
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LCD Voltage Regulator Externally
Supplied
Saving Charge Pump power consumption
 250µA on VDDINLCD and 50µA on VDDIO1
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LCD Driver Externally Supplied
Saving Charge Pump and LCD Voltage Regulator
power consumption
 250µA on VDDINLCD and 50µA on VDDIO1
 30µA on VDDLCD
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LCD Not Used
VDDLCD must be powered due to design
constraint
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Main Voltage regulator
 Features 3 different operating modes:
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Normal mode: less than 30 µA static and draws 60 mA
Deep mode: less than 8.5 µA static and draw up to 1 mA
Shutdown mode: less than 1 µA
Caution: VDDCORE cannot be powered by an external voltage
regulator is not allowed whereas it was possible in previous
SAM7 devices
1.8V
1.55V
Scalable
to
to
Voltage
 Programmable Ouput Voltage
3.6V
1.8V
Regulator
 In Deep and Normal modes only
 4 steps from 1.55V to 1.80V
 Reading the Flash at 1.55V
 MCK maximum frequency is 25 MHz
DEEP
SHDW
VRVDD
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Reset Controller
Zero-power Power-On Reset allows Supply
Controller to start properly
 POR threshold voltage rising is 2.2V on VDDIO1
 POR threshold voltage falling is 1.8V on VDDIO1
Need a voltage battery higher than 2.2V at start up
NRSTB is an ASYNCHRONOUS Reset pin
 Active in all power modes
 Acts exactly as the zero-power power-on reset
 When asserted low, the supply controller is reset and the
system parts are powered off
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Brown Out Detector
Monitors VDDIO1
 Disabled by default (to be enabled by software)
Programmable threshold
 From 1.9V to 3.4V with 100mV steps
Generate either a Reset of the core or a wake-up of
the core power supply
“Switched” mode:
 Periodic checks of VDDIO1 reduce BOD current
consumption down to 2µA
- Every 32, 256 or 2048 SLCK periods
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AT91SAM7L
Clock Considerations
Saving Power with Clock Flexibility
Many designers equate low power to slow
clock frequencies
However depending on what the MCU is
doing and what low power mode are
available on the MCU, running at maximum
speed can actually save power
Need an MCU with flexible clocks!
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Clock Sources
Slow Clock – SLCK
 On-chip 32KHz RC oscillator (20KHz-44KHz)
 Xtal 32KHz oscillator featuring bypass mode
 Selection is made through XTALSEL bit in SUPC_CR
Main Clock – MAINCK
 On-chip 2MHz RC oscillator (1.35MHz-2.65MHz)
 External clock on CLKIN pin up to 32MHz
 Selection is made through MCKSEL bit in CKGR_MOR
PLL Clock – PLLCK
 Input frequency: SLCK
 Output frequency: 18 to 47MHz
 PLL fast startup to reach 70% of its target
frequency in less than 60µs
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Reset State
On-chip 32KHz RC oscillator is enabled and
selected as being SLCK
Xtal 32KHz oscillator is powered and
disabled
On-chip 2MHz RC oscillator is enabled and
selected as being MAINCK
PLL is disabled
The Processor and the Master Clock
selection is the on-chip 2MHz RC oscillator
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Clock Management Diagram
In: SLCK (32KHz)
IDLE mode
support
Out: 18MHz - 47MHz
Select the master clock
CSS
PLLRC
external
filter
PLL
20-44kHz
On-Chip
32KHz
RC Osc.
PLLCK
XIN
XTALSEL
Prescaler
Ext. Clk up
to 32MHz
CLKIN
MCK
1..64 Step:
power of 2
Periph
Clk
On/Off
Crystal
Osc.
Ext 44KHz max
XOUT
PCK
On/Off
PCK max 37MHz
SLCK
Crystal
32KHz or
Ext clock
on XIN
CPU
Peripherals
CLOCKS
MCK_SEL
MAINCK
On-Chip
2MHz
RC Osc.
PLLCK
SLCK
MAINCK
Prescaler
1..64 Step:
power of 2
pck[0:2]
Programmable clock
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Clock Management Diagram
In: SLCK (32KHz)
IDLE mode
support
Out: 18MHz - 47MHz
Select the master clock
CSS
PLLRC
external
filter
PLL
20-44kHz
On-Chip
32KHz
RC Osc.
XIN
Ext. Clk up
to 37MHz
CLKIN
PLLCK
XTALSEL
Prescaler
At
Reset
Periph
Clk
On/Off
Ext 44KHz max
Peripherals
CLOCKS
At
Reset
MCK_SEL
MAINCK
On-Chip
2MHz
RC Osc.
MCK
1..64 Step:
power of 2
Crystal
Osc.
XOUT
PCK
On/Off
PCK max 37MHz
SLCK
Crystal
32KHz or
Ext clock
on XIN
CPU
PLLCK
SLCK
MAINCK
Prescaler
1..64 Step:
power of 2
pck[0:2]
Programmable clock
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What about accuracy?
Both on-chip RC oscillators do not provide good
accuracy
 On-chip 32KHz RC oscillator (20KHz-44KHz)
 On-chip 2MHz RC oscillator (1.35MHz-2.65MHz)
For applications requiring better accuracy
 Xtal 32KHz oscillator or external 32KHz clock signal
 External clock signal on XIN
 Auto calibration by software using an external signal
- DBGU in SAM-BA Boot
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Startup Time – OFF MODE
Power-On
&
Low level on
FWUP
800µs max.
POR
Startup
30 SLCK cycles
1ms max.
430µs max.
FWUP
Debouncing
Voltage
Regulator +
1 SLCK cycle
2 MAINCK cycles
1µs max.
First Instruction
Fetched
CPU
Startup
2,2ms max.
Power-on to First-Instruction
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Wake-up Time – Backup MODE
Wake-Up
Sources
430µs max.
Voltage
Regulator +
1 SLCK cycle
5µs max.
2MHz RC
Startup
2 MAINCK cycles
1µs max.
First Instruction
Fetched
CPU
Startup
440µs max.
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Wake-up Time – Wait MODE
Wake-Up
Sources
5µs max.
Voltage Regulator
in deep or
normal mode
2 MAINCK cycles
1µs max.
Next Instruction
Fetched
CPU
Startup
2MHz RC
Startup
6µs max.
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Voltage Regulator
in deep or
normal mode
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What’s new?
First SAM7 device with Xtal 32KHz oscillator
including bypass mode support
Fast on-chip 2MHz RC oscillator
After reset, the Main Clock derives from the
on-chip 2MHz RC oscillator
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AT91SAM7L
Supply Controller
Remove power from the chip?
MCU's are moving into smaller geometries to
reduce die size, which results in transistors that
cannot tolerate direct application of 3 or more volts.
So, voltage regulators are used to drop the voltage
to the internal logic
Unfortunately, these regulators add to the MCU's
current draw.
Removing power requires a more expensive toggle
switch to disable power-up to the chip
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AT91SAM7L Power Control
1.8V to 3.6V
32kHz
RC Osc
Power
Supply
Controller
32kHz
Crystal
Osc
VDDINLCD
VDD3V6
VDDLCD
RTC
BOD
Charge Pump
LCD
Regulator
VDDIO2
LCD Controller
VDDIO2
VDDIO1
VDDOUT
VDDCORE
Scalable
Main Voltage
Regulator
PIOA / PIOB
POR
SRAM 2KB(backup)
PIOC
VDDIO1
VDDIO1
ARM7TDMI
Memory Controller
SRAM 4KB
Peripherals
Fast RC Osc
FLASH
VDDCORE
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Low Power Modes
 OFF Mode
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Power consumption 100nA typ
Real OFF-mode
Use of a push button instead of a regular switch
Tie FWUP pin low when OFF mode is not used
 Backup Mode
 Power consumption 3µA typ
 Backup SRAM and RTC are optional in this mode
 Various wake-up sources
 Wait Mode
 Power consumption 9 µA typ
 Fast wake-up time of 6µs (maximum)
 Wake-up from where the code has been stopped
 Idle Mode
 Same mode as all SAM7 components: PCK is Off
 Wake-up by interrupt
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OFF Mode (Entry State)
Wake-up 5ms
Sleep 60µs
Active Mode
Wake-up
6µs
Sleep
2µs
Wait Mode
VReg out = 1.35V
PMC out = 0Hz
Backup SRAM ON
RTC ON
LCD OFF
Flash OFF
VReg out = 1.8V
PMC out = 2MHz
Processor clock on
Backup SRAM ON
Wake-up
500µs
Wake up
> 1ms
Sleep
60µs
Backup Mode
VReg OFF
PMC OFF
Backup SRAM ON
RTC ON
LCD OFF
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Idle Mode
VReg out = 1.35V
PMC out = 500Hz
Processor clock off
Backup SRAM ON
RTC ON
LCD OFF
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AT91SAM7L
Peripherals
Wide range of on-chip peripherals
 SPI, USART, I²C, Timer Counters, PWM, I/Os,
RTC, ADC and Segment LCD Controller
 No USB Device Port
 No SSC (I2S)
 No High-current drive pads (16mA)
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SLCD Controller
 Up to 40 segments and 10 Commons
 Support Static, 1/2, 1/3, 1/4, 1/5, 1/6, 1/7, 1/8, 1/9 & 1/10 duty
 Support Static, 1/2, 1/3 and 1/4 bias
 LCD regulator Output Voltage (Contrast) Software Selectable
between 2.4 and 3.4V (16 steps)
 Flexible selection of frame frequency (from Slow Clock)
 Display Data Latch (Full freedom in Memory Register update)
 Not needed Segment and Common pins can be used as I/Os
 Programmable Buffer Driving Time (Up to 100% of the time)
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Real Time Clock
Continuously clocked by SLCK
Complete time-of-day clock with alarm and a
two-hundred-year Gregorian calendar
 Time and calendar values are coded in binarycoded decimal (BCD) format
 Time format can be 24-hour mode or 12-hour
mode with an AM/PM indicator
 Five programmable alarm fields: month, date,
hours, minutes and seconds
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I/Os
80 IOs : PIOA, PIOB and PIOC
Schmitt triggers on all inputs
IOs are not 5V tolerant
Maximum frequency
 PIOC
: 37MHz @3V, 20MHz @1V8 (max)
 PIOA, PIOB
: 36MHz @3V, 20MHz @1V8 (max)
PIOC5 to PIOC8 drive 4mA
 All other I/Os drive 2mA
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AT91SAM7L
Memory Mapping / Boot
Memory Mapping
Common peripherals between SAM7S/X/SE and
SAM7L have same user interface addresses
The split 6 Kbytes of SRAM (4KB Core + 2KB
Backup) are seen contiguously at address: @
0x002F F000
SRAM Core 4KB
SRAM Backup 2KB
0x0020 0000
1MB
0x002F FFFF
0x0030 0000
1MB
0x003F FFFF
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BootROM Memory
Contains 3 applications:
 SAM-BA Boot
- Provides In-System Programming Solutions through serial
communication channels
 Fast Flash Programming Interface (FFPI)
- Provides Production Programming Solutions using gang
programmers
 IAP Function: In Application Programming
- Function located in ROM, that can be called by any software
application
Executed from ROM, allows FLASH programming by code running in
FLASH
Takes one argument in parameter : the command to be sent to the EFC
Send the desired FLASH command to the EFC and waits for the FLASH
to be ready
No external Crystal
needed
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Boot Solutions
GPNVM1 = 0
GPNVM1 = 1
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Boot Solutions
Power Up
Yes
No
TST = 1
No
Yes
GPNVM1 = 1
PC0=PC1=1
Boot From ROM
Boot From Flash
SAM-BA Boot
User Application
Yes
FFPI
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Boot Solutions
No
GPNVM1 = 1
Yes
Boot From ROM:
Boot From FLASH:
SAM-BA Boot
User Application
Flash @: 0x0010_0000
Flash @: 0x0000_0000
(and 0x0010_0000)
ROM @: 0x0000_0000
(and 0x0040_0000)
ROM @: 0x0040_0000
Set GPNVM1 to boot
from
Flash after reset
Clear GPNVM1 to boot
from
ROM after reset
Power Up
Power Up
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AT91SAM7L-EK
For seminars and training only!
AT91SAM7L-EK
 One handheld board
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One 400-segment LCD Display
One 35-key Keyboard (7x5 matrix)
Two AAA battery clip socket
IrDA transceiver
Weather Station
(Temperature/Pressure sensor)
SPI DataFlash® SD/MMC Card
connector
ZIGBEE expansion connector
(optional RZ502 board)
One VCC battery input monitor
One Force Wake-up push button
One Reset push button
Configuration Jumpers
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AT91SAM7L-EK
 One docking board
 5-Volt DC power supply input
 One Yellow Power Supply LED
(software controlled)
 Two Green User LEDs
 One JTAG/ICE interface
 One HE10 ADC connector (4
inputs)
 Three expansion connectors
(PIOA, PIOB, PIOC)
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AT91SAM7L-STK
Official AT91SAM7L Starter Kit
available for customers!
AT91SAM7L-STK
 Low cost version
 One 400-segment LCD Display
 Two AAA battery clip socket
 One JTAG/ICE interface
 ZIGBEE expansion connector
 One expansion connectors
(PIOC)
 One Force Wake-up push
button
 One Reset push button
 Four User push buttons
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AT91SAM7L Key Selling Features
Directly Supplied by batteries
Embeds a 30MIPS processor with a 6KBytes SRAM
and a 64KBytes or 128KBytes Flash
2Kbytes Backup SRAM + RTC for a few µA
Offers a wide range of operating modes
Guarantees µsec-range wake-up time
Embeds a wide range of peripherals
 SPI, USART, I²C, Timer Counters, PWM, I/Os, ADC
Embeds a 40x10 Segment LCD Controller
 On-chip voltage regulator and contrast control
2 packages options
 QFP128 or BGA144
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