Transcript Compact model extraction from TCAD - MOS-AK

ETH
Swiss federal Institute of Technology
Zurich
TCAD for compact modeling
Luca Sponton, Paul Pfaeffli and Lars Bomholt
September 22nd, 2006
MOS-AK Workshop
Montreux
Outline
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
Introduction
Bringing process information to design
PCM example
Process-aware SPICE compact models
Challenges for TCAD-generated models
Summary
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
2
Motivation
 The impact of variation on product performance and yield grows
 Increasing difficulty in keeping strict statistical control on a
process
Bring process variations to circuit simulation and
design
 Be able to design robustness against process variation into the
product
 Be able to optimize manufacturing for product performance
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
3
Variations Lead to Yield Loss
 Parametric yield loss is caused
by variations:
• Increasing margins would
substantially diminish the
advantages of technology
scaling.
 Corner models could bring to a
too conservative design
 Corner models do not allow
any understanding of the
process variation impact on a
design
Both design and process may contribute to the deviations.
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
4
Outline






Introduction
Bringing process information to design
PCM example
Process-aware SPICE compact models
Challenges for TCAD-generated models
Summary
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
5
Traditional flow: data from measurements
E-TEST DATA
SPICE PARAMETER EXTRACTION
PROS:
• Well established methodology
• Automatic procedure
• Captures most of variability
CORRELATION ANALYSIS
PRINCIPAL COMPONENT ANALYSIS
GENERATE EQUATIONS
MONTECARLO SIMULATION
ETH
Swiss federal Institute of Technology
Zurich
CONS:
• Components are not correlated
with underlying process variations
• Overestimates
• Parameters can assume
unphysical values
• Stable process flow
Luca Sponton
6
Advantages of TCAD extracted models
 TCAD is the ideal tool to characterize process variations
 TCAD simulations are accurate, do not drift during time and are
available in an early stage of technology development
 It is possible to access process parameters and device
characteristics that are not controlled or measured accurately in
manufacturing
 It is cheaper than running large design of experiments on
silicon
How do we bring process information into design?
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
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Bringing process to circuit simulation with TCAD
-Process simulation
Process variability
- DOE of process variations
- Device simulations
Device characteristics
Compact models
Full circuit
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
8
Process compact models (PCM)
 PCM creates a link between the space of process variables and
device characteristics through a response surface model
Device Characteristic = f(Process Characteristics)
 Let us try to do the same for SPICE parameters:
Vth0=f1(Tox, Ch_Dose, Ha_dose, Spike_T, …)
u0=f2(Tox, Ch_Dose, Ha_dose, Spike_T, …)
…
 Physically meaningful parameters, that vary smoothly with
process variations, allow for a better quality of PCM
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
9
Process compact model for SPICE parameters
Process variables {Pi}
Set of Process variables {P}
DOE, n experiments
Process simulation n devices
PCM generation
PCM
Device simulations
SPICE parameters extraction
SPICE model card
N SPICE model cards
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
10
Consistent extraction from TCAD
Extraction of
Nominal
device
Selection of
Parameters
subset
Parameters
extraction
for whole DOE
PCM
extraction
Use Local
Optimization
 Nominal SPICE model obtained from nominal process
 Small subset of parameters extracted to take into account
process variability
 Automatic BSIM3 SPICE parameters extraction for every
device in the DOE
 Accurate models obtained by a combined local optimization +
global refinement
 Use of bounded optimization to ensure physical meaning of
extracted parameters
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
11
Outline






Introduction
Bringing process information to design
PCM example
Process-aware SPICE compact models
Challenges for TCAD-generated models
Summary
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
12
PCM Example
 Full factorial DOE on gate length, gate oxide thickness, Halo
implant dose & tilt and channel dose
 Nominal device extracted, then a subset of 16 SPICE
parameters is used to account for process variations: vth0, Ua,
Uc, k1, k2, Voff, Nfactor, eta0,Delta, Vsat, a0, Pclm, pdiblc1,
Keta
 Computational time is ~ 3h for each process variation.
Experiments can be parallelized on a cluster of computers
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
13
Consistent extraction
 Extracted parameters follow process variations thanks to the
local optimization and bounded extraction algorithm
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
14
Consistent extraction
 Physical meaning of parameters is maintained by the extraction
strategy chosen, accuracy may suffer compared to global
optimization due to the limited set of parameters chosen
 From the full set of SPICE cards a PCM is generated
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
15
PCM generation
 PCM generated SPICE model accuracy is good using neural
networks as response surfaces. Simple polynomial response
surface models do not give a good accuracy.
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
16
PCM generated SPICE parameters
 Predicted models show some error when compared to TCAD
simulations: we trade some accuracy for getting the processdesign link
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
17
Consistent extraction from TCAD
PROS:
• Early availability of models
• Physically meaningful SPICE parameters
• Consistent extraction and PCM allow linking directly SPICE
parameters to process variations
CONS:
•
•
•
•
Nominal device extraction time consuming
Automated extraction flow has to be optimized on the process
Accuracy worse than with global ‘unbounded’ optimization
Model prediction introduces additional error
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
18
Outline






Introduction
Process variations to circuit variations
PCM example
Process-aware SPICE compact models
Challenges for TCAD-generated models
Summary
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
19
Process-aware SPICE models: PARAMOS
 Different approach: embedding process parameters directly into
the SPICE model
 Extraction of SPICE parameters including PCM parameters
through extraction from an entire DOE reflecting the process
conditions
 Parameter definition:
~n
M i  M i 0   aijn Pj
j
n
~ Pj  Pj 0
Pj 

With Mi SPICE parameter, Pi process parameter
 Extraction tool: Paramos
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
20
Process-Aware SPICE Model: PARAMOS
 TCAD simulations
• Generate I-V / C-V database
for each process parameter
set {Pi}
 Global SPICE extraction
• Create a compact model
with process parameters as
SPICE library parameters.
• Polynomial fitting
• Vth = Vth0 + SSai(n)Pin
• Voff = Voff0 + SSbi(n)Pin
 All curves and coefficients are
extracted in a single
optimization step
ETH
Swiss federal Institute of Technology
Zurich
Manufacturing
Calibration
TCAD
(process & device)
{ Pi }
I-V, C-V database {Pi}
SPICE Extraction
Process-Aware Compact
SPICE Model {Pi}
{Pi} accessible for circuit simulations!
Courtesy of S. Tirumala, Synopsys
Luca Sponton
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Case Study

Typical 90 nm Technology
• Tox = 16 A, Lg = 65 nm,
Vdd = 1.0 V
 Normalized variation Dpi:
Dpi = (Pi - Pi0)/(Pimax - Pi0)
Range of Dpi : from -100% to
+100%
ETH
Swiss federal Institute of Technology
Zurich
Variation
Range
Process Parameters
Pox
Gate oxidation
temperature
±10oC
Phn,p
Halo implant dose
±1e12 cm-2
Pst
Spike temperature
±10oC
Pvt
Vt Adjust implant
dose
±1e12 cm-2
Plg
Gate length
deviation (DL)
±5 nm
Device
Idsat
(mA/mm)
Vt-Lin
(V)
Ioff
(nA/mm)
NMOS
640
0.36
2.35
PMOS
241
0.32
0.67
Courtesy of S. Tirumala, Synopsys
Luca Sponton
22
Quality of Compact Model Extraction
Model
TCAD
difference between TCAD
and Spice Simulations (%)
50
1.E-15
C-V
Total Gate Cap (F)
1.E-15
1.E-15
9.E-16
8.E-16
Model
TCAD sim
7.E-16
6.E-16
30
20
10
-10
-20
-30
1.77%
-1.43%
-3.44%
Vt-Lin
Idsat
-35.7%
Ioff
2.00
1.50
1.00
0.50
0.00
-0.50
-1.00
5.E-16
-1.50
1.24%
0
-40
-2.00
30.88%
40
Gate Bias
 Excellent fit for I-V curves (rms error < 5%)
 Excellent fit for Vt-Lin and Idsat ( <4%)
 Acceptable fit for Ioff (<40%)
ETH
Swiss federal Institute of Technology
Zurich
Courtesy of S. Tirumala, Synopsys
Luca Sponton
23
Delay Variation and Sensitivity
30%
Delay Variation
Gate oxidation temperature (Pox)
n-Halo implant (Phn)
10%
DL (Plg)
0%
-10%
100%
50%
0%
-50%
-20%
-100%
Input rise
20%
Normalized process variation
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Delay is most sensitive to Tox variation .
• Varies from -10% to +24% as Dpox changes -100% to +100%
The response to gate length variation (DL) is relatively weak
• - 5% to +5% across the full range of DL variation.
Variation around nominal process is non-symmetrical
• -10 % vs 24% for min and max variation.
ETH
Swiss federal Institute of Technology
Zurich
Courtesy of S. Tirumala, Synopsys
Luca Sponton
24
Outline






Introduction
Process variations to circuit variations
Extraction techniques for variability
Process-aware SPICE compact models
Challenges for TCAD-generated models
Summary
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
25
Challenges for TCAD-generated models
 There are historically some missing links between TCAD and
compact model extraction [1]:
•
•
•
•
Lithography effects on gate shape
Isolation formation (STI or LOCOS)
Outdiffusion of implanted dopant
…
 All these effects are 3D effects not easily accountable for with
2D simulations
[1] C.C. McAndrews, “Predictive technology characterization, missing
links between TCAD and compact modeling”, Proc. of SISPAD,
2000
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
26
Bridging the gap: lithography
Lithography effects on gate shape:
L.Sponton et al., “A Full 3D TCAD Simulation Study of Line-Width Roughness Effects in 65
nm Technology”, Proc. Of SISPAD, Sept. 2006
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
27
Bridging the gap: INWE
Narrow width effect on the transistor characteristics
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
28
Summary
 There is a growing need to understand the effect of process
variation on circuit performance
 Using calibrated TCAD simulations it is possible to study the
effects of slight process variation on device characteristics
 Process-aware SPICE models offer a way to bring process
variation information to the design sphere
 With standard BSIM models it is necessary to trade some
accuracy for being able to properly and consistently consider
these variations
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
29
Acknowledgements
 The authors would like to thank people at Synopsys
and ETH Zurich for their contribution to the work, in
particular Dipankar Pramanik, Shridhar Tirumala,
Sathya Krishnamurthy, Yuri Mahotin
 Part of this work was financed through the KTI
Project “Parametric Design and Analysis for
Semiconductor Technology Computer Aided Design
(PARA-TCAD)”
ETH
Swiss federal Institute of Technology
Zurich
Luca Sponton
30
ETH
Swiss federal Institute of Technology
Zurich
Thanks for your attention
Luca Sponton
Swiss Federal Institute of Technology (ETH)
Integrated Systems Laboratory
Phone: +41 44 632 7786 (ETH)
Phone: +41 44 567 1555 (SYNOPSYS)
Email: [email protected]
September 22nd, 2006
MOS-AK Workshop
Montreux