Transcript 7400 Logic Replacement - Universidade da Beira Interior

Digital Consumer Roadshow 2004:
7400 Logic Replacement
The 7400 Series
– A Brief History •
1960s space program drove
development of 7400 series
― Consumed all available devices for
internal flight computer
― $1000 / device (1960 dollars)
― 10:1 integration improvement over
discrete transistors
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1963 Minuteman missile forced 7400
into mass production
― Drove pricing down to $25 / circuit
(1963 dollars)
Success Drives Proliferation
2003
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New families introduced based on
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Higher performance
Lower power
New features
New signaling threshold
1960
•
Spawned over 32 unique families!
Too Much of a Good Thing?
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An availability nightmare! >> 500K unique devices
Families
Packages
Reliability options
Speed grades
Features
Functions
Different Families Don’t all Speak the
Same Language
Sometimes Things Get Lost or
Added in the Translation*
Different families aren’t always on speaking terms with one another
The Ultimate Solution For 7400 Logic
Replacement
High Performance
3.5ns tPD, fmax 303Mhz
Improved features
Low Cost
0.18µ = small die size
Lowest cost packaging
Storage Systems, Routers
Set-Top Box, Cell phone
Lowest Power
12mW*
~20uA typical stand-by
Handheld, Portable Equipment
Eliminate Availability & Obsolescence
Issues
•
Over >> 500,000 different 7400 devices addressed in one package!
― Nothing needs to get “lost or added in the translation”
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AND Additional features for free
― EMI management, system clocking, reprogrammability,
design security….
Driving Down Costs Through Process
Technology
Feature Size (micron)
0.35
0.25
CPLDs
0.18
0.13
0.10
0.07
1999
2000
2001
2002
2003
2004
CPLD Vs. Discrete 7400
Total Product Cost
Die Cost
Test Cost
Package Cost
1000 % Reduction in die cost through
semiconductor process technology
CPLD
1985
Discrete
CPLD
2003
Discrete
Xilinx CPLDs Offer More for Less
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Die Cost
Test Cost
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Package Cost
8
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Equivalent to > 8
Discrete TTL Devices
CPLD
2003
More:
For Less
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Discrete
These are the fundamentals behind the death of the 7400 series…
Logic
Features
Performance
Security
Flexibility
Price
Board Area
Power
EMI
The CPLD Cost Advantage
Device Cost Comparison 7400 vs. CPLD
Total Device Cost
CPLD Price Advantage
7400 Cost
Number of Discrete Devices
34
31
28
25
22
19
16
13
10
7
4
1
CoolRunner Cost
Cost Advantage Case Study
- PVR -
ICs Inside the Box
BOM Analysis
Clock
µP control
Buffers/
Drivers
Discrete
Logic
Peripheral
7400 Replacement Solution
Low Power, Low Cost
Buffers/
Drivers
Watchdog
Timer
Discrete
Logic
Peripheral UART
Additional
Logic, IO and
System
Resources
Discrete components cost: $5.73
XC2C128 - $4.60
Saved: $1.13
Reducing the Overall BOM
Additional features using
Programmable Logic for
FREE !!
250KU Pricing
* High-volume pricing
estimate
Re-programmability
Solution Cost
Time-to-market
Board Area
Power Savings
Performance
Additional Logic
Additional Memory
$5.73
$3.16
$1.96
$0.91
Save $1.13
Additional I/O
Buffers / Drivers
$2.57*
UART
$2.20*
Watchdog Timer
$1.05*
Discrete Logic
Chips
$0.91*
Standard Solutions
XC2C128
VQ100C
Coolrunner-II Solution
$4.60
Cost Advantage Case Study
Instrumentation
(1)
(2)
(2)
(2)
(1)
(2)
Cost Advantage Case Study
GPS PDA
(1)
(4)
(1)
(1)
CoolRunner-II Changes the Equation
• Lower cost, higher integration than 7400 TTL
• Additional features that manage real world issues
― EMI
― System clocking
― Design security
― Obsolescence / availability
― Reduced test costs
― External interfacing components eliminated
― In field bug fixes, upgrades, changes
Managing EMI
CoolRunner-II Benefits
• Typically considered “black magic”
• Significant TTM impact to achieve compliance
― Board spins, test time etc.
• CoolRunner-II features and integration benefits
address EMI
― Programmable drive strength, I/O signaling,
programmable ground, programmable
slew rate, PLLs
CoolRunner-II
Design Security
•
7400 series has no inherent means to
thwart reverse engineering
― Remove device marking?
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CoolRunner-II
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Programmable bit stream security
Prevents both over-writing or readback
Four levels of on-chip-security
Tampering causes device to
automatically lock down
Reduced Test Costs
• CPLD integration reduces “bed of nails” test time
― Reduced points to interrogate
• Reduced device count significantly increases FITs
― Mis-aligned / wrong part placement
― Soldering failure
• CoolRunner-II JTAG test port – “free” allows for PCB
testing
― Inherent programmability provides 100% test coverage
CoolRunner-II
Simplified Interfacing
• Additional components for interfacing disparate 7400 logic families
― Pull up resistors etc.
• Additional components typically required to communicate with
interface logic
― Bus transceivers, high performance memory interfaces, slow slew rate
signaling
• CoolRunner-II programmable I/O eliminates need for external
interface devices
― Programmable HSTL, SSTL, Schmitt Trigger etc.
― Considerable board area and cost savings!
The Ultimate Advantage
- Reprogrammability • CoolRunner-II CPLDs can be programmed at any phase
of product life-cycle
― Prototyping, field trials, and in market
The World of TTL
Logic Cell Estimation Errors
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1 Macrocell Utilized vs. Four
• Unused Gates in Package
• Synthesized to 1 Macrocell
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Unused Logic Device Functionality
X
Logic Cell Estimator Guarantees that Results will be
as Good or Better than Estimated Savings Value