Transcript presentation

WTO Information technology
symposium.
"The Challenges ahead for the ITA with
Converging Technologies and IC
Manufacturing Techniques"
Ray Foy – Intel Corp. EMEA Customs &
Licensing manager
Moore’s Law
The number of transistors on a chip will double every 18-24 months
1 Billion transistors before 2010
# of transistors
1,000,000,000
Pentium 4
Pentium III
Pentium II
Pentium
486 DX
386
286
42 Million
10,000,000
1,000,000
100,000
8086
8080
8008
4004
1970
100,000,000
10,000
1980
1990
2000
1,000
2010
Building an Integrated Circuit
~ 60 days to manufacture
• Precision at the
molecular and atomic
levels.
• 23 masking layers.
• Some layers are
thinner than a virus.
Transistor
Process Trends: New Generation Every 2
Years
10000
10
Nominal feature size
1000
1
130nm
90nm
Micron
Nanometer
Gate Length
100
0.1
Nanotechnology
70nm
50nm
10
0.01
1970
1980
1990
2000
Source: Intel
2010
2020
Processor Technology
1 nanometer = 1 billionth of a meter
Silicon Process
Transistors
Technology 800nm 600nm 350nm 250nm 180nm 130nm (Millions)
Pentium®
Processor
3.3
Pentium® Pro
Processor
5.5
Pentium® II
Processor
7.5
Pentium® III
Processor
9.5 - 25
Pentium® 4
Processor
42+
Itanium® 2
Processor
480
Smaller, Faster, Better, Cheaper
Average Transistor Price By Year
$
10
1
0.1
0.01
0.001
0.0001
0.00001
0.000001
0.0000001
'68
'70
'72
'74
'76
'78
'80
'82
'84
'86
Source: Dataquest/Intel12/02
'88
'90
'92
'94
'96
'98
'00
'02
Si Technology: Complexity Increasing
Exponentially
Roadmap Trends: Summary
More Speed per processors
More memory integration
More processors per core
More transistors per processor.
More complex manufacturing.
Larger wafers
Narrower circuits.
The boundaries of physical science are the
perennial challenge.
SIP Technologies:
Stacked Die + Stacked Packages
Thru silicon and other
advanced package options
Next generation
Multichip Module
Folded Stacked
Chip Scale Package
Chip Scale
Stacked Package
2004/2005
2003/2004
Today
2005/2006
Stacked thin die
+
Packaging
integration
Microprocessor evolution – 1996 / 1997
L2 Cache/
TAG/
Controller
CPU &
L1 Cache/
Controller
Pentium® Pro Processor
8473.30
Pentium (R) II Processor 8473.30
Dual die
processor
Cartridge
package.
Multichip side by side in package
Vertical stacked IC’s in package
Integrated Circuit stacking.
Simple model – multi chip
.
Multi- substrate / multi IC in
package
Processor package x section
Multi chips are already here
.
Moving from Chips/Computer to Computers/Chip
All CPU development
on Dual/Multi-Core
* data is run rate exiting the year. Source: Intel, *Other names and brands may be claimed as the property of others
Processor x section
Processor packaging – The problem with
passives!
Passive devices move
classification outside HS
8542
Passive devices move
classification outside HS 8542
The problem with passives.
Integrated Passives (on silicon)
– passive components on silicon, created in the mass to all intents
and purposes indivisible.
– Combined in multichip forms with other active IC’s
ALTERNATIVE TECHNOLOGY
– TO CERAMIC / OTHER FORMS
– SIGNIFICANT REDUCTION IN SIZE.
– DRIVES FURTHER MINIATURISATION
– All products of the semiconductor industry.
BUT NOT ACCORDING TO THE CURRENT H.S.
Digital Home Vision
BROADBAND
Entertainment,
E-Business, Services
MEDIA
Pre-Recorded Content
Personal Media
Any Content1, Any Place,
Any Device, Any Time
BROADCAST
1 As Authorized
Services,
Entertainment
Digital Home:
All Devices and
Content are
going Digital
Convergence Vision
All computing devices communicate
All communication devices compute
Any Time,
Anywhere,
Any Device
All enabled by silicon
Demand
COMPUTING
COMMUNICATIONS
Innovation
Summary
Miniaturising
– Micron-scale to nano-scale.
Functionalising.
– Reduced size enables more functions in less
space (all on silicon)
– More integration / more complexity.
Converging. (computing and comunications)
– Developers put more optimum functionality for
multiple application.
The Challenge
The HS is unable to cope with the advance of
technology. The problem is NOW!
– All computing devices communicate
– All communication devices compute
– All enabled by silicon.
Silicon circuitry and high density packaging serve:
– energy conservation
– Miniaturisation
– Complex multifunctionality.
The current HS should not be a limiter to ITA
expansion.